contrib/octeon-sdk/cvmx-pcm-defs.h

56 static inline uint64_t CVMX_PCM_CLKX_CFG(unsigned long offset)
59 	      (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((offset <= 1))) ||
60 	      (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((offset <= 1))) ||
61 	      (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((offset <= 1))) ||
62 	      (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((offset <= 1))) ||
63 	      (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((offset <= 1)))))
64 		cvmx_warn("CVMX_PCM_CLKX_CFG(%lu) is invalid on this chip\n", offset);
65 	return CVMX_ADD_IO_SEG(0x0001070000010000ull) + ((offset) & 1) * 16384;
68 #define CVMX_PCM_CLKX_CFG(offset) (CVMX_ADD_IO_SEG(0x0001070000010000ull) + ((offset) & 1) * 16384)
71 static inline uint64_t CVMX_PCM_CLKX_DBG(unsigned long offset)
74 	      (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((offset <= 1))) ||
75 	      (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((offset <= 1))) ||
76 	      (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((offset <= 1))) ||
77 	      (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((offset <= 1))) ||
78 	      (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((offset <= 1)))))
79 		cvmx_warn("CVMX_PCM_CLKX_DBG(%lu) is invalid on this chip\n", offset);
80 	return CVMX_ADD_IO_SEG(0x0001070000010038ull) + ((offset) & 1) * 16384;
83 #define CVMX_PCM_CLKX_DBG(offset) (CVMX_ADD_IO_SEG(0x0001070000010038ull) + ((offset) & 1) * 16384)
86 static inline uint64_t CVMX_PCM_CLKX_GEN(unsigned long offset)
89 	      (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((offset <= 1))) ||
90 	      (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((offset <= 1))) ||
91 	      (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((offset <= 1))) ||
92 	      (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((offset <= 1))) ||
93 	      (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((offset <= 1)))))
94 		cvmx_warn("CVMX_PCM_CLKX_GEN(%lu) is invalid on this chip\n", offset);
95 	return CVMX_ADD_IO_SEG(0x0001070000010008ull) + ((offset) & 1) * 16384;
98 #define CVMX_PCM_CLKX_GEN(offset) (CVMX_ADD_IO_SEG(0x0001070000010008ull) + ((offset) & 1) * 16384)