Lines Matching refs:block_id
56 static inline uint64_t CVMX_PCIEEPX_CFG000(unsigned long block_id)
59 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
60 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
61 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
62 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
63 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
64 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
65 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
66 cvmx_warn("CVMX_PCIEEPX_CFG000(%lu) is invalid on this chip\n", block_id);
70 #define CVMX_PCIEEPX_CFG000(block_id) (0x0000000000000000ull)
73 static inline uint64_t CVMX_PCIEEPX_CFG001(unsigned long block_id)
76 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
77 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
78 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
79 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
80 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
81 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
82 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
83 cvmx_warn("CVMX_PCIEEPX_CFG001(%lu) is invalid on this chip\n", block_id);
87 #define CVMX_PCIEEPX_CFG001(block_id) (0x0000000000000004ull)
90 static inline uint64_t CVMX_PCIEEPX_CFG002(unsigned long block_id)
93 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
94 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
95 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
96 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
97 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
98 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
99 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
100 cvmx_warn("CVMX_PCIEEPX_CFG002(%lu) is invalid on this chip\n", block_id);
104 #define CVMX_PCIEEPX_CFG002(block_id) (0x0000000000000008ull)
107 static inline uint64_t CVMX_PCIEEPX_CFG003(unsigned long block_id)
110 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
111 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
112 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
113 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
114 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
115 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
116 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
117 cvmx_warn("CVMX_PCIEEPX_CFG003(%lu) is invalid on this chip\n", block_id);
121 #define CVMX_PCIEEPX_CFG003(block_id) (0x000000000000000Cull)
124 static inline uint64_t CVMX_PCIEEPX_CFG004(unsigned long block_id)
127 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
128 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
129 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
130 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
131 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
132 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
133 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
134 cvmx_warn("CVMX_PCIEEPX_CFG004(%lu) is invalid on this chip\n", block_id);
138 #define CVMX_PCIEEPX_CFG004(block_id) (0x0000000000000010ull)
141 static inline uint64_t CVMX_PCIEEPX_CFG004_MASK(unsigned long block_id)
144 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
145 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
146 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
147 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
148 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
149 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
150 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
151 cvmx_warn("CVMX_PCIEEPX_CFG004_MASK(%lu) is invalid on this chip\n", block_id);
155 #define CVMX_PCIEEPX_CFG004_MASK(block_id) (0x0000000080000010ull)
158 static inline uint64_t CVMX_PCIEEPX_CFG005(unsigned long block_id)
161 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
162 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
163 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
164 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
165 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
166 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
167 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
168 cvmx_warn("CVMX_PCIEEPX_CFG005(%lu) is invalid on this chip\n", block_id);
172 #define CVMX_PCIEEPX_CFG005(block_id) (0x0000000000000014ull)
175 static inline uint64_t CVMX_PCIEEPX_CFG005_MASK(unsigned long block_id)
178 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
179 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
180 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
181 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
182 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
183 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
184 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
185 cvmx_warn("CVMX_PCIEEPX_CFG005_MASK(%lu) is invalid on this chip\n", block_id);
189 #define CVMX_PCIEEPX_CFG005_MASK(block_id) (0x0000000080000014ull)
192 static inline uint64_t CVMX_PCIEEPX_CFG006(unsigned long block_id)
195 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
196 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
197 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
198 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
199 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
200 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
201 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
202 cvmx_warn("CVMX_PCIEEPX_CFG006(%lu) is invalid on this chip\n", block_id);
206 #define CVMX_PCIEEPX_CFG006(block_id) (0x0000000000000018ull)
209 static inline uint64_t CVMX_PCIEEPX_CFG006_MASK(unsigned long block_id)
212 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
213 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
214 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
215 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
216 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
217 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
218 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
219 cvmx_warn("CVMX_PCIEEPX_CFG006_MASK(%lu) is invalid on this chip\n", block_id);
223 #define CVMX_PCIEEPX_CFG006_MASK(block_id) (0x0000000080000018ull)
226 static inline uint64_t CVMX_PCIEEPX_CFG007(unsigned long block_id)
229 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
230 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
231 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
232 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
233 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
234 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
235 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
236 cvmx_warn("CVMX_PCIEEPX_CFG007(%lu) is invalid on this chip\n", block_id);
240 #define CVMX_PCIEEPX_CFG007(block_id) (0x000000000000001Cull)
243 static inline uint64_t CVMX_PCIEEPX_CFG007_MASK(unsigned long block_id)
246 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
247 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
248 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
249 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
250 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
251 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
252 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
253 cvmx_warn("CVMX_PCIEEPX_CFG007_MASK(%lu) is invalid on this chip\n", block_id);
257 #define CVMX_PCIEEPX_CFG007_MASK(block_id) (0x000000008000001Cull)
260 static inline uint64_t CVMX_PCIEEPX_CFG008(unsigned long block_id)
263 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
264 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
265 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
266 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
267 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
268 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
269 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
270 cvmx_warn("CVMX_PCIEEPX_CFG008(%lu) is invalid on this chip\n", block_id);
274 #define CVMX_PCIEEPX_CFG008(block_id) (0x0000000000000020ull)
277 static inline uint64_t CVMX_PCIEEPX_CFG008_MASK(unsigned long block_id)
280 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
281 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
282 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
283 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
284 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
285 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
286 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
287 cvmx_warn("CVMX_PCIEEPX_CFG008_MASK(%lu) is invalid on this chip\n", block_id);
291 #define CVMX_PCIEEPX_CFG008_MASK(block_id) (0x0000000080000020ull)
294 static inline uint64_t CVMX_PCIEEPX_CFG009(unsigned long block_id)
297 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
298 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
299 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
300 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
301 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
302 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
303 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
304 cvmx_warn("CVMX_PCIEEPX_CFG009(%lu) is invalid on this chip\n", block_id);
308 #define CVMX_PCIEEPX_CFG009(block_id) (0x0000000000000024ull)
311 static inline uint64_t CVMX_PCIEEPX_CFG009_MASK(unsigned long block_id)
314 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
315 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
316 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
317 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
318 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
319 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
320 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
321 cvmx_warn("CVMX_PCIEEPX_CFG009_MASK(%lu) is invalid on this chip\n", block_id);
325 #define CVMX_PCIEEPX_CFG009_MASK(block_id) (0x0000000080000024ull)
328 static inline uint64_t CVMX_PCIEEPX_CFG010(unsigned long block_id)
331 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
332 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
333 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
334 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
335 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
336 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
337 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
338 cvmx_warn("CVMX_PCIEEPX_CFG010(%lu) is invalid on this chip\n", block_id);
342 #define CVMX_PCIEEPX_CFG010(block_id) (0x0000000000000028ull)
345 static inline uint64_t CVMX_PCIEEPX_CFG011(unsigned long block_id)
348 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
349 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
350 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
351 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
352 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
353 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
354 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
355 cvmx_warn("CVMX_PCIEEPX_CFG011(%lu) is invalid on this chip\n", block_id);
359 #define CVMX_PCIEEPX_CFG011(block_id) (0x000000000000002Cull)
362 static inline uint64_t CVMX_PCIEEPX_CFG012(unsigned long block_id)
365 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
366 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
367 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
368 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
369 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
370 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
371 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
372 cvmx_warn("CVMX_PCIEEPX_CFG012(%lu) is invalid on this chip\n", block_id);
376 #define CVMX_PCIEEPX_CFG012(block_id) (0x0000000000000030ull)
379 static inline uint64_t CVMX_PCIEEPX_CFG012_MASK(unsigned long block_id)
382 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
383 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
384 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
385 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
386 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
387 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
388 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
389 cvmx_warn("CVMX_PCIEEPX_CFG012_MASK(%lu) is invalid on this chip\n", block_id);
393 #define CVMX_PCIEEPX_CFG012_MASK(block_id) (0x0000000080000030ull)
396 static inline uint64_t CVMX_PCIEEPX_CFG013(unsigned long block_id)
399 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
400 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
401 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
402 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
403 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
404 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
405 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
406 cvmx_warn("CVMX_PCIEEPX_CFG013(%lu) is invalid on this chip\n", block_id);
410 #define CVMX_PCIEEPX_CFG013(block_id) (0x0000000000000034ull)
413 static inline uint64_t CVMX_PCIEEPX_CFG015(unsigned long block_id)
416 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
417 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
418 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
419 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
420 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
421 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
422 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
423 cvmx_warn("CVMX_PCIEEPX_CFG015(%lu) is invalid on this chip\n", block_id);
427 #define CVMX_PCIEEPX_CFG015(block_id) (0x000000000000003Cull)
430 static inline uint64_t CVMX_PCIEEPX_CFG016(unsigned long block_id)
433 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
434 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
435 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
436 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
437 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
438 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
439 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
440 cvmx_warn("CVMX_PCIEEPX_CFG016(%lu) is invalid on this chip\n", block_id);
444 #define CVMX_PCIEEPX_CFG016(block_id) (0x0000000000000040ull)
447 static inline uint64_t CVMX_PCIEEPX_CFG017(unsigned long block_id)
450 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
451 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
452 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
453 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
454 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
455 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
456 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
457 cvmx_warn("CVMX_PCIEEPX_CFG017(%lu) is invalid on this chip\n", block_id);
461 #define CVMX_PCIEEPX_CFG017(block_id) (0x0000000000000044ull)
464 static inline uint64_t CVMX_PCIEEPX_CFG020(unsigned long block_id)
467 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
468 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
469 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
470 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
471 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
472 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
473 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
474 cvmx_warn("CVMX_PCIEEPX_CFG020(%lu) is invalid on this chip\n", block_id);
478 #define CVMX_PCIEEPX_CFG020(block_id) (0x0000000000000050ull)
481 static inline uint64_t CVMX_PCIEEPX_CFG021(unsigned long block_id)
484 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
485 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
486 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
487 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
488 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
489 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
490 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
491 cvmx_warn("CVMX_PCIEEPX_CFG021(%lu) is invalid on this chip\n", block_id);
495 #define CVMX_PCIEEPX_CFG021(block_id) (0x0000000000000054ull)
498 static inline uint64_t CVMX_PCIEEPX_CFG022(unsigned long block_id)
501 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
502 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
503 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
504 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
505 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
506 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
507 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
508 cvmx_warn("CVMX_PCIEEPX_CFG022(%lu) is invalid on this chip\n", block_id);
512 #define CVMX_PCIEEPX_CFG022(block_id) (0x0000000000000058ull)
515 static inline uint64_t CVMX_PCIEEPX_CFG023(unsigned long block_id)
518 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
519 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
520 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
521 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
522 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
523 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
524 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
525 cvmx_warn("CVMX_PCIEEPX_CFG023(%lu) is invalid on this chip\n", block_id);
529 #define CVMX_PCIEEPX_CFG023(block_id) (0x000000000000005Cull)
532 static inline uint64_t CVMX_PCIEEPX_CFG028(unsigned long block_id)
535 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
536 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
537 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
538 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
539 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
540 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
541 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
542 cvmx_warn("CVMX_PCIEEPX_CFG028(%lu) is invalid on this chip\n", block_id);
546 #define CVMX_PCIEEPX_CFG028(block_id) (0x0000000000000070ull)
549 static inline uint64_t CVMX_PCIEEPX_CFG029(unsigned long block_id)
552 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
553 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
554 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
555 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
556 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
557 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
558 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
559 cvmx_warn("CVMX_PCIEEPX_CFG029(%lu) is invalid on this chip\n", block_id);
563 #define CVMX_PCIEEPX_CFG029(block_id) (0x0000000000000074ull)
566 static inline uint64_t CVMX_PCIEEPX_CFG030(unsigned long block_id)
569 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
570 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
571 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
572 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
573 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
574 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
575 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
576 cvmx_warn("CVMX_PCIEEPX_CFG030(%lu) is invalid on this chip\n", block_id);
580 #define CVMX_PCIEEPX_CFG030(block_id) (0x0000000000000078ull)
583 static inline uint64_t CVMX_PCIEEPX_CFG031(unsigned long block_id)
586 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
587 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
588 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
589 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
590 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
591 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
592 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
593 cvmx_warn("CVMX_PCIEEPX_CFG031(%lu) is invalid on this chip\n", block_id);
597 #define CVMX_PCIEEPX_CFG031(block_id) (0x000000000000007Cull)
600 static inline uint64_t CVMX_PCIEEPX_CFG032(unsigned long block_id)
603 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
604 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
605 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
606 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
607 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
608 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
609 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
610 cvmx_warn("CVMX_PCIEEPX_CFG032(%lu) is invalid on this chip\n", block_id);
614 #define CVMX_PCIEEPX_CFG032(block_id) (0x0000000000000080ull)
617 static inline uint64_t CVMX_PCIEEPX_CFG033(unsigned long block_id)
620 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
621 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
622 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
623 cvmx_warn("CVMX_PCIEEPX_CFG033(%lu) is invalid on this chip\n", block_id);
627 #define CVMX_PCIEEPX_CFG033(block_id) (0x0000000000000084ull)
630 static inline uint64_t CVMX_PCIEEPX_CFG034(unsigned long block_id)
633 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
634 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
635 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
636 cvmx_warn("CVMX_PCIEEPX_CFG034(%lu) is invalid on this chip\n", block_id);
640 #define CVMX_PCIEEPX_CFG034(block_id) (0x0000000000000088ull)
643 static inline uint64_t CVMX_PCIEEPX_CFG037(unsigned long block_id)
646 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
647 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
648 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
649 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
650 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
651 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
652 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
653 cvmx_warn("CVMX_PCIEEPX_CFG037(%lu) is invalid on this chip\n", block_id);
657 #define CVMX_PCIEEPX_CFG037(block_id) (0x0000000000000094ull)
660 static inline uint64_t CVMX_PCIEEPX_CFG038(unsigned long block_id)
663 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
664 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
665 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
666 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
667 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
668 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
669 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
670 cvmx_warn("CVMX_PCIEEPX_CFG038(%lu) is invalid on this chip\n", block_id);
674 #define CVMX_PCIEEPX_CFG038(block_id) (0x0000000000000098ull)
677 static inline uint64_t CVMX_PCIEEPX_CFG039(unsigned long block_id)
680 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
681 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
682 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
683 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
684 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
685 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
686 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
687 cvmx_warn("CVMX_PCIEEPX_CFG039(%lu) is invalid on this chip\n", block_id);
691 #define CVMX_PCIEEPX_CFG039(block_id) (0x000000000000009Cull)
694 static inline uint64_t CVMX_PCIEEPX_CFG040(unsigned long block_id)
697 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
698 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
699 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
700 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
701 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
702 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
703 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
704 cvmx_warn("CVMX_PCIEEPX_CFG040(%lu) is invalid on this chip\n", block_id);
708 #define CVMX_PCIEEPX_CFG040(block_id) (0x00000000000000A0ull)
711 static inline uint64_t CVMX_PCIEEPX_CFG041(unsigned long block_id)
714 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
715 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
716 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
717 cvmx_warn("CVMX_PCIEEPX_CFG041(%lu) is invalid on this chip\n", block_id);
721 #define CVMX_PCIEEPX_CFG041(block_id) (0x00000000000000A4ull)
724 static inline uint64_t CVMX_PCIEEPX_CFG042(unsigned long block_id)
727 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
728 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
729 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1)))))
730 cvmx_warn("CVMX_PCIEEPX_CFG042(%lu) is invalid on this chip\n", block_id);
734 #define CVMX_PCIEEPX_CFG042(block_id) (0x00000000000000A8ull)
737 static inline uint64_t CVMX_PCIEEPX_CFG064(unsigned long block_id)
740 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
741 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
742 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
743 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
744 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
745 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
746 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
747 cvmx_warn("CVMX_PCIEEPX_CFG064(%lu) is invalid on this chip\n", block_id);
751 #define CVMX_PCIEEPX_CFG064(block_id) (0x0000000000000100ull)
754 static inline uint64_t CVMX_PCIEEPX_CFG065(unsigned long block_id)
757 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
758 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
759 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
760 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
761 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
762 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
763 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
764 cvmx_warn("CVMX_PCIEEPX_CFG065(%lu) is invalid on this chip\n", block_id);
768 #define CVMX_PCIEEPX_CFG065(block_id) (0x0000000000000104ull)
771 static inline uint64_t CVMX_PCIEEPX_CFG066(unsigned long block_id)
774 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
775 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
776 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
777 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
778 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
779 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
780 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
781 cvmx_warn("CVMX_PCIEEPX_CFG066(%lu) is invalid on this chip\n", block_id);
785 #define CVMX_PCIEEPX_CFG066(block_id) (0x0000000000000108ull)
788 static inline uint64_t CVMX_PCIEEPX_CFG067(unsigned long block_id)
791 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
792 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
793 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
794 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
795 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
796 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
797 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
798 cvmx_warn("CVMX_PCIEEPX_CFG067(%lu) is invalid on this chip\n", block_id);
802 #define CVMX_PCIEEPX_CFG067(block_id) (0x000000000000010Cull)
805 static inline uint64_t CVMX_PCIEEPX_CFG068(unsigned long block_id)
808 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
809 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
810 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
811 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
812 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
813 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
814 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
815 cvmx_warn("CVMX_PCIEEPX_CFG068(%lu) is invalid on this chip\n", block_id);
819 #define CVMX_PCIEEPX_CFG068(block_id) (0x0000000000000110ull)
822 static inline uint64_t CVMX_PCIEEPX_CFG069(unsigned long block_id)
825 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
826 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
827 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
828 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
829 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
830 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
831 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
832 cvmx_warn("CVMX_PCIEEPX_CFG069(%lu) is invalid on this chip\n", block_id);
836 #define CVMX_PCIEEPX_CFG069(block_id) (0x0000000000000114ull)
839 static inline uint64_t CVMX_PCIEEPX_CFG070(unsigned long block_id)
842 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
843 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
844 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
845 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
846 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
847 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
848 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
849 cvmx_warn("CVMX_PCIEEPX_CFG070(%lu) is invalid on this chip\n", block_id);
853 #define CVMX_PCIEEPX_CFG070(block_id) (0x0000000000000118ull)
856 static inline uint64_t CVMX_PCIEEPX_CFG071(unsigned long block_id)
859 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
860 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
861 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
862 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
863 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
864 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
865 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
866 cvmx_warn("CVMX_PCIEEPX_CFG071(%lu) is invalid on this chip\n", block_id);
870 #define CVMX_PCIEEPX_CFG071(block_id) (0x000000000000011Cull)
873 static inline uint64_t CVMX_PCIEEPX_CFG072(unsigned long block_id)
876 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
877 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
878 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
879 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
880 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
881 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
882 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
883 cvmx_warn("CVMX_PCIEEPX_CFG072(%lu) is invalid on this chip\n", block_id);
887 #define CVMX_PCIEEPX_CFG072(block_id) (0x0000000000000120ull)
890 static inline uint64_t CVMX_PCIEEPX_CFG073(unsigned long block_id)
893 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
894 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
895 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
896 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
897 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
898 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
899 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
900 cvmx_warn("CVMX_PCIEEPX_CFG073(%lu) is invalid on this chip\n", block_id);
904 #define CVMX_PCIEEPX_CFG073(block_id) (0x0000000000000124ull)
907 static inline uint64_t CVMX_PCIEEPX_CFG074(unsigned long block_id)
910 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
911 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
912 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
913 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
914 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
915 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
916 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
917 cvmx_warn("CVMX_PCIEEPX_CFG074(%lu) is invalid on this chip\n", block_id);
921 #define CVMX_PCIEEPX_CFG074(block_id) (0x0000000000000128ull)
924 static inline uint64_t CVMX_PCIEEPX_CFG448(unsigned long block_id)
927 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
928 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
929 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
930 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
931 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
932 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
933 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
934 cvmx_warn("CVMX_PCIEEPX_CFG448(%lu) is invalid on this chip\n", block_id);
938 #define CVMX_PCIEEPX_CFG448(block_id) (0x0000000000000700ull)
941 static inline uint64_t CVMX_PCIEEPX_CFG449(unsigned long block_id)
944 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
945 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
946 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
947 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
948 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
949 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
950 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
951 cvmx_warn("CVMX_PCIEEPX_CFG449(%lu) is invalid on this chip\n", block_id);
955 #define CVMX_PCIEEPX_CFG449(block_id) (0x0000000000000704ull)
958 static inline uint64_t CVMX_PCIEEPX_CFG450(unsigned long block_id)
961 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
962 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
963 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
964 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
965 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
966 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
967 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
968 cvmx_warn("CVMX_PCIEEPX_CFG450(%lu) is invalid on this chip\n", block_id);
972 #define CVMX_PCIEEPX_CFG450(block_id) (0x0000000000000708ull)
975 static inline uint64_t CVMX_PCIEEPX_CFG451(unsigned long block_id)
978 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
979 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
980 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
981 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
982 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
983 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
984 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
985 cvmx_warn("CVMX_PCIEEPX_CFG451(%lu) is invalid on this chip\n", block_id);
989 #define CVMX_PCIEEPX_CFG451(block_id) (0x000000000000070Cull)
992 static inline uint64_t CVMX_PCIEEPX_CFG452(unsigned long block_id)
995 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
996 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
997 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
998 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
999 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1000 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1001 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1002 cvmx_warn("CVMX_PCIEEPX_CFG452(%lu) is invalid on this chip\n", block_id);
1006 #define CVMX_PCIEEPX_CFG452(block_id) (0x0000000000000710ull)
1009 static inline uint64_t CVMX_PCIEEPX_CFG453(unsigned long block_id)
1012 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1013 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1014 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1015 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1016 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1017 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1018 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1019 cvmx_warn("CVMX_PCIEEPX_CFG453(%lu) is invalid on this chip\n", block_id);
1023 #define CVMX_PCIEEPX_CFG453(block_id) (0x0000000000000714ull)
1026 static inline uint64_t CVMX_PCIEEPX_CFG454(unsigned long block_id)
1029 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1030 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1031 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1032 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1033 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1034 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1035 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1036 cvmx_warn("CVMX_PCIEEPX_CFG454(%lu) is invalid on this chip\n", block_id);
1040 #define CVMX_PCIEEPX_CFG454(block_id) (0x0000000000000718ull)
1043 static inline uint64_t CVMX_PCIEEPX_CFG455(unsigned long block_id)
1046 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1047 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1048 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1049 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1050 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1051 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1052 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1053 cvmx_warn("CVMX_PCIEEPX_CFG455(%lu) is invalid on this chip\n", block_id);
1057 #define CVMX_PCIEEPX_CFG455(block_id) (0x000000000000071Cull)
1060 static inline uint64_t CVMX_PCIEEPX_CFG456(unsigned long block_id)
1063 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1064 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1065 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1066 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1067 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1068 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1069 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1070 cvmx_warn("CVMX_PCIEEPX_CFG456(%lu) is invalid on this chip\n", block_id);
1074 #define CVMX_PCIEEPX_CFG456(block_id) (0x0000000000000720ull)
1077 static inline uint64_t CVMX_PCIEEPX_CFG458(unsigned long block_id)
1080 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1081 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1082 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1083 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1084 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1085 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1086 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1087 cvmx_warn("CVMX_PCIEEPX_CFG458(%lu) is invalid on this chip\n", block_id);
1091 #define CVMX_PCIEEPX_CFG458(block_id) (0x0000000000000728ull)
1094 static inline uint64_t CVMX_PCIEEPX_CFG459(unsigned long block_id)
1097 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1098 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1099 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1100 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1101 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1102 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1103 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1104 cvmx_warn("CVMX_PCIEEPX_CFG459(%lu) is invalid on this chip\n", block_id);
1108 #define CVMX_PCIEEPX_CFG459(block_id) (0x000000000000072Cull)
1111 static inline uint64_t CVMX_PCIEEPX_CFG460(unsigned long block_id)
1114 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1115 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1116 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1117 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1118 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1119 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1120 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1121 cvmx_warn("CVMX_PCIEEPX_CFG460(%lu) is invalid on this chip\n", block_id);
1125 #define CVMX_PCIEEPX_CFG460(block_id) (0x0000000000000730ull)
1128 static inline uint64_t CVMX_PCIEEPX_CFG461(unsigned long block_id)
1131 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1132 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1133 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1134 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1135 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1136 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1137 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1138 cvmx_warn("CVMX_PCIEEPX_CFG461(%lu) is invalid on this chip\n", block_id);
1142 #define CVMX_PCIEEPX_CFG461(block_id) (0x0000000000000734ull)
1145 static inline uint64_t CVMX_PCIEEPX_CFG462(unsigned long block_id)
1148 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1149 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1150 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1151 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1152 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1153 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1154 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1155 cvmx_warn("CVMX_PCIEEPX_CFG462(%lu) is invalid on this chip\n", block_id);
1159 #define CVMX_PCIEEPX_CFG462(block_id) (0x0000000000000738ull)
1162 static inline uint64_t CVMX_PCIEEPX_CFG463(unsigned long block_id)
1165 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1166 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1167 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1168 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1169 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1170 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1171 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1172 cvmx_warn("CVMX_PCIEEPX_CFG463(%lu) is invalid on this chip\n", block_id);
1176 #define CVMX_PCIEEPX_CFG463(block_id) (0x000000000000073Cull)
1179 static inline uint64_t CVMX_PCIEEPX_CFG464(unsigned long block_id)
1182 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1183 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1184 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1185 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1186 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1187 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1188 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1189 cvmx_warn("CVMX_PCIEEPX_CFG464(%lu) is invalid on this chip\n", block_id);
1193 #define CVMX_PCIEEPX_CFG464(block_id) (0x0000000000000740ull)
1196 static inline uint64_t CVMX_PCIEEPX_CFG465(unsigned long block_id)
1199 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1200 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1201 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1202 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1203 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1204 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1205 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1206 cvmx_warn("CVMX_PCIEEPX_CFG465(%lu) is invalid on this chip\n", block_id);
1210 #define CVMX_PCIEEPX_CFG465(block_id) (0x0000000000000744ull)
1213 static inline uint64_t CVMX_PCIEEPX_CFG466(unsigned long block_id)
1216 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1217 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1218 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1219 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1220 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1221 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1222 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1223 cvmx_warn("CVMX_PCIEEPX_CFG466(%lu) is invalid on this chip\n", block_id);
1227 #define CVMX_PCIEEPX_CFG466(block_id) (0x0000000000000748ull)
1230 static inline uint64_t CVMX_PCIEEPX_CFG467(unsigned long block_id)
1233 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1234 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1235 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1236 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1237 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1238 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1239 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1240 cvmx_warn("CVMX_PCIEEPX_CFG467(%lu) is invalid on this chip\n", block_id);
1244 #define CVMX_PCIEEPX_CFG467(block_id) (0x000000000000074Cull)
1247 static inline uint64_t CVMX_PCIEEPX_CFG468(unsigned long block_id)
1250 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1251 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1252 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1253 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1254 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1255 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1256 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1257 cvmx_warn("CVMX_PCIEEPX_CFG468(%lu) is invalid on this chip\n", block_id);
1261 #define CVMX_PCIEEPX_CFG468(block_id) (0x0000000000000750ull)
1264 static inline uint64_t CVMX_PCIEEPX_CFG490(unsigned long block_id)
1267 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1268 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1269 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1270 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1271 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1272 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1273 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1274 cvmx_warn("CVMX_PCIEEPX_CFG490(%lu) is invalid on this chip\n", block_id);
1278 #define CVMX_PCIEEPX_CFG490(block_id) (0x00000000000007A8ull)
1281 static inline uint64_t CVMX_PCIEEPX_CFG491(unsigned long block_id)
1284 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1285 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1286 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1287 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1288 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1289 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1290 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1291 cvmx_warn("CVMX_PCIEEPX_CFG491(%lu) is invalid on this chip\n", block_id);
1295 #define CVMX_PCIEEPX_CFG491(block_id) (0x00000000000007ACull)
1298 static inline uint64_t CVMX_PCIEEPX_CFG492(unsigned long block_id)
1301 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1302 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1303 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1304 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1305 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1306 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1307 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1308 cvmx_warn("CVMX_PCIEEPX_CFG492(%lu) is invalid on this chip\n", block_id);
1312 #define CVMX_PCIEEPX_CFG492(block_id) (0x00000000000007B0ull)
1315 static inline uint64_t CVMX_PCIEEPX_CFG515(unsigned long block_id)
1318 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1319 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1320 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1321 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1322 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1323 cvmx_warn("CVMX_PCIEEPX_CFG515(%lu) is invalid on this chip\n", block_id);
1327 #define CVMX_PCIEEPX_CFG515(block_id) (0x000000000000080Cull)
1330 static inline uint64_t CVMX_PCIEEPX_CFG516(unsigned long block_id)
1333 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1334 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1335 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1336 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1337 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1338 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1339 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1340 cvmx_warn("CVMX_PCIEEPX_CFG516(%lu) is invalid on this chip\n", block_id);
1344 #define CVMX_PCIEEPX_CFG516(block_id) (0x0000000000000810ull)
1347 static inline uint64_t CVMX_PCIEEPX_CFG517(unsigned long block_id)
1350 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id == 0))) ||
1351 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0))) ||
1352 (OCTEON_IS_MODEL(OCTEON_CN61XX) && ((block_id <= 1))) ||
1353 (OCTEON_IS_MODEL(OCTEON_CN63XX) && ((block_id <= 1))) ||
1354 (OCTEON_IS_MODEL(OCTEON_CN66XX) && ((block_id <= 1))) ||
1355 (OCTEON_IS_MODEL(OCTEON_CN68XX) && ((block_id <= 1))) ||
1356 (OCTEON_IS_MODEL(OCTEON_CNF71XX) && ((block_id <= 1)))))
1357 cvmx_warn("CVMX_PCIEEPX_CFG517(%lu) is invalid on this chip\n", block_id);
1361 #define CVMX_PCIEEPX_CFG517(block_id) (0x0000000000000814ull)