contrib/octeon-sdk/cvmx-dma-engine.c

60 #include <asm/octeon/cvmx-dma-engine.h>
74 #include "cvmx-dma-engine.h"
107     int engine;
109     for (engine=0; engine < cvmx_dma_engine_get_num(); engine++)
112         result = cvmx_cmd_queue_initialize(CVMX_CMD_QUEUE_DMA(engine),
121             dmax_ibuff_saddr.s.saddr = cvmx_ptr_to_phys(cvmx_cmd_queue_buffer(CVMX_CMD_QUEUE_DMA(engine))) >> 7;
122             cvmx_write_csr(CVMX_PEXP_NPEI_DMAX_IBUFF_SADDR(engine), dmax_ibuff_saddr.u64);
129             dpi_dmax_ibuff_saddr.s.saddr = cvmx_ptr_to_phys(cvmx_cmd_queue_buffer(CVMX_CMD_QUEUE_DMA(engine))) >> 7;
130             cvmx_write_csr(CVMX_DPI_DMAX_IBUFF_SADDR(engine), dpi_dmax_ibuff_saddr.u64);
134             uint64_t address = cvmx_ptr_to_phys(cvmx_cmd_queue_buffer(CVMX_CMD_QUEUE_DMA(engine)));
135             if (engine)
178         /* Give engine 0-4 1KB, and 5 3KB. This gives the packet engines better
199         /* When dma_control[pkt_en] = 1, engine 5 is used for packets and is not
236     int engine;
238     for (engine=0; engine < cvmx_dma_engine_get_num(); engine++)
240         if (cvmx_cmd_queue_length(CVMX_CMD_QUEUE_DMA(engine)))
281     for (engine=0; engine < cvmx_dma_engine_get_num(); engine++)
283         cvmx_cmd_queue_shutdown(CVMX_CMD_QUEUE_DMA(engine));
285             cvmx_write_csr(CVMX_PEXP_NPEI_DMAX_IBUFF_SADDR(engine), 0);
287             cvmx_write_csr(CVMX_DPI_DMAX_IBUFF_SADDR(engine), 0);
290             if (engine)
306  * @param engine  Engine to submit to (0 to cvmx_dma_engine_get_num()-1)
314 int cvmx_dma_engine_submit(int engine, cvmx_dma_engine_header_t header, int num_buffers, cvmx_dma_engine_buffer_t buffers[])
325             cvmx_dprintf("DMA engine submit too large\n");
341     __cvmx_cmd_queue_lock(CVMX_CMD_QUEUE_DMA(engine), __cvmx_cmd_queue_get_state(CVMX_CMD_QUEUE_DMA(engine)));
342     result = cvmx_cmd_queue_write(CVMX_CMD_QUEUE_DMA(engine), 0, cmd_count, cmds);
353             cvmx_write64_uint32(CVMX_PEXP_NPEI_DMAX_DBELL(engine)^4, cmd_count);
356             cvmx_write_csr(CVMX_DPI_DMAX_DBELL(engine), cmd_count);
359             if (engine)
366     __cvmx_cmd_queue_unlock(__cvmx_cmd_queue_get_state(CVMX_CMD_QUEUE_DMA(engine)));
497  * Build the first and last pointers based on a DMA engine header
498  * and submit them to the engine. The purpose of this function is
499  * to simplify the building of DMA engine commands by automatically
504  * @param engine Engine to submit to (0 to cvmx_dma_engine_get_num()-1)
519 int cvmx_dma_engine_transfer(int engine, cvmx_dma_engine_header_t header,
548     return cvmx_dma_engine_submit(engine, header, words, buffers);