Lines Matching refs:tim_mult
57 static uint32_t ns_to_tim_reg(int tim_mult, uint32_t nsecs)
65 if (tim_mult != 1)
66 val = FLASH_RoundUP(val, tim_mult);
71 uint64_t cvmx_compactflash_generate_dma_tim(int tim_mult, uint16_t *ident_data, int *mwdma_mode_ptr)
125 switch (tim_mult)
128 dma_tim.s.tim_mult = 1;
131 dma_tim.s.tim_mult = 2;
134 dma_tim.s.tim_mult = 0;
137 dma_tim.s.tim_mult = 3;
140 cvmx_dprintf("ERROR: invalid boot bus dma tim_mult setting\n");
159 dma_arq = 8; // not spec'ed, value in eclocks, not affected by tim_mult
174 dma_arq = 8; // not spec'ed, value in eclocks, not affected by tim_mult
196 dma_arq = 8; // not spec'ed, value in eclocks, not affected by tim_mult
214 dma_tim.s.oe_n = ns_to_tim_reg(tim_mult, oe_n);
215 dma_tim.s.oe_a = ns_to_tim_reg(tim_mult, oe_a);
217 dma_tim.s.dmack_s = ns_to_tim_reg(tim_mult, dma_acks);
218 dma_tim.s.dmack_h = ns_to_tim_reg(tim_mult, dma_ackh);
221 dma_tim.s.pause = ns_to_tim_reg(tim_mult, pause);
226 dma_tim.s.we_n = ns_to_tim_reg(tim_mult, oe_n);
227 dma_tim.s.we_a = ns_to_tim_reg(tim_mult, oe_a);
255 int tim_mult;
369 tim_mult = 1;
379 tim_mult *= 2;
386 switch(tim_mult) {
388 mio_boot_reg_cfg.s.tim_mult = 1;
391 mio_boot_reg_cfg.s.tim_mult = 2;
394 mio_boot_reg_cfg.s.tim_mult = 0;
398 mio_boot_reg_cfg.s.tim_mult = 3;