contrib/octeon-sdk/cvmx-ciu2-defs.h

2727 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x interrupt-enable */
2741 	uint64_t mii                          : 1;
2755 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x interrupt-enable */
2769 	uint64_t mii                          : 1;
2790 	uint64_t mii                          : 1;  /**< Write 1 to clear CIU2_EN_xx_yy_PKT[MII] */
2804 	uint64_t mii                          : 1;
2818 	uint64_t mii                          : 1;  /**< Write 1 to clear CIU2_EN_xx_yy_PKT[MII] */
2832 	uint64_t mii                          : 1;
2853 	uint64_t mii                          : 1;  /**< Write 1 to enable CIU2_EN_xx_yy_PKT[MII] */
2867 	uint64_t mii                          : 1;
2881 	uint64_t mii                          : 1;  /**< Write 1 to enable CIU2_EN_xx_yy_PKT[MII] */
2895 	uint64_t mii                          : 1;
3831 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x interrupt-enable */
3845 	uint64_t mii                          : 1;
3859 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x interrupt-enable */
3873 	uint64_t mii                          : 1;
3894 	uint64_t mii                          : 1;  /**< Write 1 to clear CIU2_EN_xx_yy_PKT[MII] */
3908 	uint64_t mii                          : 1;
3922 	uint64_t mii                          : 1;  /**< Write 1 to clear CIU2_EN_xx_yy_PKT[MII] */
3936 	uint64_t mii                          : 1;
3957 	uint64_t mii                          : 1;  /**< Write 1 to enable CIU2_EN_xx_yy_PKT[MII] */
3971 	uint64_t mii                          : 1;
3985 	uint64_t mii                          : 1;  /**< Write 1 to enable CIU2_EN_xx_yy_PKT[MII] */
3999 	uint64_t mii                          : 1;
4935 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x interrupt-enable */
4949 	uint64_t mii                          : 1;
4963 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x interrupt-enable */
4977 	uint64_t mii                          : 1;
4998 	uint64_t mii                          : 1;  /**< Write 1 to clear CIU2_EN_xx_yy_PKT[MII] */
5012 	uint64_t mii                          : 1;
5026 	uint64_t mii                          : 1;  /**< Write 1 to clear CIU2_EN_xx_yy_PKT[MII] */
5040 	uint64_t mii                          : 1;
5061 	uint64_t mii                          : 1;  /**< Write 1 to enable CIU2_EN_xx_yy_PKT[MII] */
5075 	uint64_t mii                          : 1;
5089 	uint64_t mii                          : 1;  /**< Write 1 to enable CIU2_EN_xx_yy_PKT[MII] */
5103 	uint64_t mii                          : 1;
6039 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x interrupt-enable */
6053 	uint64_t mii                          : 1;
6067 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x interrupt-enable */
6081 	uint64_t mii                          : 1;
6102 	uint64_t mii                          : 1;  /**< Write 1 to clear CIU2_EN_xx_yy_PKT[MII] */
6116 	uint64_t mii                          : 1;
6130 	uint64_t mii                          : 1;  /**< Write 1 to clear CIU2_EN_xx_yy_PKT[MII] */
6144 	uint64_t mii                          : 1;
6165 	uint64_t mii                          : 1;  /**< Write 1 to enable CIU2_EN_xx_yy_PKT[MII] */
6179 	uint64_t mii                          : 1;
6193 	uint64_t mii                          : 1;  /**< Write 1 to enable CIU2_EN_xx_yy_PKT[MII] */
6207 	uint64_t mii                          : 1;
7125 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x Interrupts
7145 	uint64_t mii                          : 1;
7159 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x Interrupts
7179 	uint64_t mii                          : 1;
7550 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x Interrupts
7570 	uint64_t mii                          : 1;
7584 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x Interrupts
7604 	uint64_t mii                          : 1;
7975 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x Interrupts
7995 	uint64_t mii                          : 1;
8009 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x Interrupts
8029 	uint64_t mii                          : 1;
8400 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x Interrupts
8420 	uint64_t mii                          : 1;
8434 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x Interrupts
8454 	uint64_t mii                          : 1;
8847 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x Interrupts source
8865 	uint64_t mii                          : 1;
8880 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x Interrupts source
8898 	uint64_t mii                          : 1;
9287 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x Interrupts source
9305 	uint64_t mii                          : 1;
9320 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x Interrupts source
9338 	uint64_t mii                          : 1;
9730 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x Interrupts source
9748 	uint64_t mii                          : 1;
9763 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x Interrupts source
9781 	uint64_t mii                          : 1;
10170 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x Interrupts source
10188 	uint64_t mii                          : 1;
10203 	uint64_t mii                          : 1;  /**< RGMII/MII/MIX Interface x Interrupts source
10221 	uint64_t mii                          : 1;