Lines Matching refs:ipd
2933 uint64_t ipd : 1; /**< IPD interrupt-enable */
2941 uint64_t ipd : 1;
2989 uint64_t ipd : 1; /**< IPD interrupt-enable */
2997 uint64_t ipd : 1;
3052 uint64_t ipd : 1; /**< Write 1 to clear CIU2_EN_xx_yy_RML[IPD] */
3060 uint64_t ipd : 1;
3108 uint64_t ipd : 1; /**< Write 1 to clear CIU2_EN_xx_yy_RML[IPD] */
3116 uint64_t ipd : 1;
3171 uint64_t ipd : 1; /**< Write 1 to enable CIU2_EN_xx_yy_RML[IPD] */
3179 uint64_t ipd : 1;
3227 uint64_t ipd : 1; /**< Write 1 to enable CIU2_EN_xx_yy_RML[IPD] */
3235 uint64_t ipd : 1;
4037 uint64_t ipd : 1; /**< IPD interrupt-enable */
4045 uint64_t ipd : 1;
4093 uint64_t ipd : 1; /**< IPD interrupt-enable */
4101 uint64_t ipd : 1;
4156 uint64_t ipd : 1; /**< Write 1 to clear CIU2_EN_xx_yy_RML[IPD] */
4164 uint64_t ipd : 1;
4212 uint64_t ipd : 1; /**< Write 1 to clear CIU2_EN_xx_yy_RML[IPD] */
4220 uint64_t ipd : 1;
4275 uint64_t ipd : 1; /**< Write 1 to enable CIU2_EN_xx_yy_RML[IPD] */
4283 uint64_t ipd : 1;
4331 uint64_t ipd : 1; /**< Write 1 to enable CIU2_EN_xx_yy_RML[IPD] */
4339 uint64_t ipd : 1;
5141 uint64_t ipd : 1; /**< IPD interrupt-enable */
5149 uint64_t ipd : 1;
5197 uint64_t ipd : 1; /**< IPD interrupt-enable */
5205 uint64_t ipd : 1;
5260 uint64_t ipd : 1; /**< Write 1 to clear CIU2_EN_xx_yy_RML[IPD] */
5268 uint64_t ipd : 1;
5316 uint64_t ipd : 1; /**< Write 1 to clear CIU2_EN_xx_yy_RML[IPD] */
5324 uint64_t ipd : 1;
5379 uint64_t ipd : 1; /**< Write 1 to enable CIU2_EN_xx_yy_RML[IPD] */
5387 uint64_t ipd : 1;
5435 uint64_t ipd : 1; /**< Write 1 to enable CIU2_EN_xx_yy_RML[IPD] */
5443 uint64_t ipd : 1;
6245 uint64_t ipd : 1; /**< IPD interrupt-enable */
6253 uint64_t ipd : 1;
6301 uint64_t ipd : 1; /**< IPD interrupt-enable */
6309 uint64_t ipd : 1;
6364 uint64_t ipd : 1; /**< Write 1 to clear CIU2_EN_xx_yy_RML[IPD] */
6372 uint64_t ipd : 1;
6420 uint64_t ipd : 1; /**< Write 1 to clear CIU2_EN_xx_yy_RML[IPD] */
6428 uint64_t ipd : 1;
6483 uint64_t ipd : 1; /**< Write 1 to enable CIU2_EN_xx_yy_RML[IPD] */
6491 uint64_t ipd : 1;
6539 uint64_t ipd : 1; /**< Write 1 to enable CIU2_EN_xx_yy_RML[IPD] */
6547 uint64_t ipd : 1;
7230 uint64_t ipd : 1; /**< IPD interrupt
7242 uint64_t ipd : 1;
7302 uint64_t ipd : 1; /**< IPD interrupt
7314 uint64_t ipd : 1;
7655 uint64_t ipd : 1; /**< IPD interrupt
7667 uint64_t ipd : 1;
7727 uint64_t ipd : 1; /**< IPD interrupt
7739 uint64_t ipd : 1;
8080 uint64_t ipd : 1; /**< IPD interrupt
8092 uint64_t ipd : 1;
8152 uint64_t ipd : 1; /**< IPD interrupt
8164 uint64_t ipd : 1;
8505 uint64_t ipd : 1; /**< IPD interrupt
8517 uint64_t ipd : 1;
8577 uint64_t ipd : 1; /**< IPD interrupt
8589 uint64_t ipd : 1;
8949 uint64_t ipd : 1; /**< IPD interrupt source
8960 uint64_t ipd : 1;
9020 uint64_t ipd : 1; /**< IPD interrupt source
9031 uint64_t ipd : 1;
9389 uint64_t ipd : 1; /**< IPD interrupt source
9400 uint64_t ipd : 1;
9460 uint64_t ipd : 1; /**< IPD interrupt source
9471 uint64_t ipd : 1;
9832 uint64_t ipd : 1; /**< IPD interrupt source
9843 uint64_t ipd : 1;
9903 uint64_t ipd : 1; /**< IPD interrupt source
9914 uint64_t ipd : 1;
10272 uint64_t ipd : 1; /**< IPD interrupt source
10283 uint64_t ipd : 1;
10343 uint64_t ipd : 1; /**< IPD interrupt source
10354 uint64_t ipd : 1;