Lines Matching defs:iob
2936 uint64_t iob : 1; /**< IOB interrupt-enable */
2938 uint64_t iob : 1;
2992 uint64_t iob : 1; /**< IOB interrupt-enable */
2994 uint64_t iob : 1;
3055 uint64_t iob : 1; /**< Write 1 to clear CIU2_EN_xx_yy_RML[IOB] */
3057 uint64_t iob : 1;
3111 uint64_t iob : 1; /**< Write 1 to clear CIU2_EN_xx_yy_RML[IOB] */
3113 uint64_t iob : 1;
3174 uint64_t iob : 1; /**< Write 1 to enable CIU2_EN_xx_yy_RML[IOB] */
3176 uint64_t iob : 1;
3230 uint64_t iob : 1; /**< Write 1 to enable CIU2_EN_xx_yy_RML[IOB] */
3232 uint64_t iob : 1;
4040 uint64_t iob : 1; /**< IOB interrupt-enable */
4042 uint64_t iob : 1;
4096 uint64_t iob : 1; /**< IOB interrupt-enable */
4098 uint64_t iob : 1;
4159 uint64_t iob : 1; /**< Write 1 to clear CIU2_EN_xx_yy_RML[IOB] */
4161 uint64_t iob : 1;
4215 uint64_t iob : 1; /**< Write 1 to clear CIU2_EN_xx_yy_RML[IOB] */
4217 uint64_t iob : 1;
4278 uint64_t iob : 1; /**< Write 1 to enable CIU2_EN_xx_yy_RML[IOB] */
4280 uint64_t iob : 1;
4334 uint64_t iob : 1; /**< Write 1 to enable CIU2_EN_xx_yy_RML[IOB] */
4336 uint64_t iob : 1;
5144 uint64_t iob : 1; /**< IOB interrupt-enable */
5146 uint64_t iob : 1;
5200 uint64_t iob : 1; /**< IOB interrupt-enable */
5202 uint64_t iob : 1;
5263 uint64_t iob : 1; /**< Write 1 to clear CIU2_EN_xx_yy_RML[IOB] */
5265 uint64_t iob : 1;
5319 uint64_t iob : 1; /**< Write 1 to clear CIU2_EN_xx_yy_RML[IOB] */
5321 uint64_t iob : 1;
5382 uint64_t iob : 1; /**< Write 1 to enable CIU2_EN_xx_yy_RML[IOB] */
5384 uint64_t iob : 1;
5438 uint64_t iob : 1; /**< Write 1 to enable CIU2_EN_xx_yy_RML[IOB] */
5440 uint64_t iob : 1;
6248 uint64_t iob : 1; /**< IOB interrupt-enable */
6250 uint64_t iob : 1;
6304 uint64_t iob : 1; /**< IOB interrupt-enable */
6306 uint64_t iob : 1;
6367 uint64_t iob : 1; /**< Write 1 to clear CIU2_EN_xx_yy_RML[IOB] */
6369 uint64_t iob : 1;
6423 uint64_t iob : 1; /**< Write 1 to clear CIU2_EN_xx_yy_RML[IOB] */
6425 uint64_t iob : 1;
6486 uint64_t iob : 1; /**< Write 1 to enable CIU2_EN_xx_yy_RML[IOB] */
6488 uint64_t iob : 1;
6542 uint64_t iob : 1; /**< Write 1 to enable CIU2_EN_xx_yy_RML[IOB] */
6544 uint64_t iob : 1;
7235 uint64_t iob : 1; /**< IOB interrupt
7239 uint64_t iob : 1;
7307 uint64_t iob : 1; /**< IOB interrupt
7311 uint64_t iob : 1;
7660 uint64_t iob : 1; /**< IOB interrupt
7664 uint64_t iob : 1;
7732 uint64_t iob : 1; /**< IOB interrupt
7736 uint64_t iob : 1;
8085 uint64_t iob : 1; /**< IOB interrupt
8089 uint64_t iob : 1;
8157 uint64_t iob : 1; /**< IOB interrupt
8161 uint64_t iob : 1;
8510 uint64_t iob : 1; /**< IOB interrupt
8514 uint64_t iob : 1;
8582 uint64_t iob : 1; /**< IOB interrupt
8586 uint64_t iob : 1;
8954 uint64_t iob : 1; /**< IOB interrupt source
8957 uint64_t iob : 1;
9025 uint64_t iob : 1; /**< IOB interrupt source
9028 uint64_t iob : 1;
9394 uint64_t iob : 1; /**< IOB interrupt source
9397 uint64_t iob : 1;
9465 uint64_t iob : 1; /**< IOB interrupt source
9468 uint64_t iob : 1;
9837 uint64_t iob : 1; /**< IOB interrupt source
9840 uint64_t iob : 1;
9908 uint64_t iob : 1; /**< IOB interrupt source
9911 uint64_t iob : 1;
10277 uint64_t iob : 1; /**< IOB interrupt source
10280 uint64_t iob : 1;
10348 uint64_t iob : 1; /**< IOB interrupt source
10351 uint64_t iob : 1;