Lines Matching defs:ah

20 #include "ah.h"
50 void ar9300_disable_cck(struct ath_hal *ah);
51 void ar9300_disable_radar(struct ath_hal *ah);
52 void ar9300_disable_restart(struct ath_hal *ah);
53 void ar9300_set_radar_dc_thresh(struct ath_hal *ah);
54 void ar9300_disable_weak_signal(struct ath_hal *ah);
55 void ar9300_disable_strong_signal(struct ath_hal *ah);
56 void ar9300_prep_spectral_scan(struct ath_hal *ah);
57 void ar9300_disable_dc_offset(struct ath_hal *ah);
58 void ar9300_enable_cck_detect(struct ath_hal *ah);
61 ar9300_disable_cck(struct ath_hal *ah)
65 val = OS_REG_READ(ah, AR_PHY_MODE);
68 OS_REG_WRITE(ah, AR_PHY_MODE, val);
72 ar9300_disable_radar(struct ath_hal *ah)
77 val = OS_REG_READ(ah, AR_PHY_RADAR_0);
88 OS_REG_WRITE(ah, AR_PHY_RADAR_0, val);
91 val = OS_REG_READ(ah, AR_PHY_RADAR_EXT);
92 OS_REG_WRITE(ah, AR_PHY_RADAR_EXT, val & ~AR_PHY_RADAR_EXT_ENA);
94 val = OS_REG_READ(ah, AR_RX_FILTER);
96 OS_REG_WRITE(ah, AR_RX_FILTER, val);
99 void ar9300_disable_restart(struct ath_hal *ah)
102 val = OS_REG_READ(ah, AR_PHY_RESTART);
104 OS_REG_WRITE(ah, AR_PHY_RESTART, val);
106 val = OS_REG_READ(ah, AR_PHY_RESTART);
109 void ar9300_set_radar_dc_thresh(struct ath_hal *ah)
112 val = OS_REG_READ(ah, AR_PHY_RADAR_EXT);
115 OS_REG_WRITE(ah, AR_PHY_RADAR_EXT, val);
117 val = OS_REG_READ(ah, AR_PHY_RADAR_EXT);
121 ar9300_disable_weak_signal(struct ath_hal *ah)
124 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_FIRPWR, 0x7f);
125 OS_REG_CLR_BIT(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_FIRPWR_SIGN_BIT);
128 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_FIRSTEP, 0x3f);
131 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_RELPWR, 0x1f);
132 OS_REG_CLR_BIT(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_RELPWR_SIGN_BIT);
135 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_RELSTEP, 0x1f);
136 OS_REG_CLR_BIT(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_RELSTEP_SIGN_BIT);
139 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG_LOW, AR_PHY_FIND_SIG_LOW_FIRPWR, 0x7f);
141 ah, AR_PHY_FIND_SIG_LOW, AR_PHY_FIND_SIG_LOW_FIRPWR_SIGN_BIT);
145 ah, AR_PHY_FIND_SIG_LOW, AR_PHY_FIND_SIG_LOW_FIRSTEP_LOW, 0x3f);
149 ah, AR_PHY_FIND_SIG_LOW, AR_PHY_FIND_SIG_LOW_RELSTEP, 0x1f);
151 ah, AR_PHY_FIND_SIG_LOW, AR_PHY_FIND_SIG_LOW_RELSTEP_SIGN_BIT);
155 ar9300_disable_strong_signal(struct ath_hal *ah)
159 val = OS_REG_READ(ah, AR_PHY_TIMING5);
161 OS_REG_WRITE(ah, AR_PHY_TIMING5, val);
163 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING5, AR_PHY_TIMING5_RSSI_THR1A, 0x7f);
167 ar9300_set_cca_threshold(struct ath_hal *ah, u_int8_t thresh62)
169 OS_REG_RMW_FIELD(ah, AR_PHY_CCA_0, AR_PHY_CCA_THRESH62, thresh62);
170 OS_REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62, thresh62);
172 OS_REG_RMW_FIELD(ah,
175 OS_REG_RMW_FIELD(ah, AR_PHY_EXT_CCA, AR_PHY_EXT_CCA_THRESH62, thresh62);
178 static void ar9300_classify_strong_bins(struct ath_hal *ah)
180 OS_REG_RMW_FIELD(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_CF_BIN_THRESH, 0x1);
183 void ar9300_disable_dc_offset(struct ath_hal *ah)
185 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING2, AR_PHY_TIMING2_DC_OFFSET, 0);
188 void ar9300_enable_cck_detect(struct ath_hal *ah)
190 OS_REG_RMW_FIELD(ah, AR_PHY_MODE, AR_PHY_MODE_DISABLE_CCK, 0);
191 OS_REG_RMW_FIELD(ah, AR_PHY_MODE, AR_PHY_MODE_DYNAMIC, 1);
194 void ar9300_prep_spectral_scan(struct ath_hal *ah)
196 ar9300_disable_radar(ah);
197 ar9300_classify_strong_bins(ah);
198 ar9300_disable_dc_offset(ah);
199 if (AH_PRIVATE(ah)->ah_curchan &&
200 IS_5GHZ_FAST_CLOCK_EN(ah, AH_PRIVATE(ah)->ah_curchan))
202 ar9300_enable_cck_detect(ah);
205 ar9300_disable_strong_signal(ah);
206 ar9300_disable_weak_signal(ah);
207 ar9300_set_radar_dc_thresh(ah);
208 ar9300_set_cca_threshold(ah, MAX_CCA_THRESH);
209 /*ar9300_disable_restart(ah);*/
211 OS_REG_WRITE(ah, AR_PHY_ERR, HAL_PHYERR_SPECTRAL);
265 ar9300_noise_floor_get(struct ath_hal *ah, int freq_mhz, int ch)
276 ath_hal_printf(ah,
279 __func__, (AH_PRIVATE(ah))->ah_macVersion,
280 (AH_PRIVATE(ah))->ah_macRev, freq_mhz, ch);
285 ar9300_noise_floor_power_get(struct ath_hal *ah, int freq_mhz, int ch)
296 ath_hal_printf(ah,
299 __func__, (AH_PRIVATE(ah))->ah_macVersion,
300 (AH_PRIVATE(ah))->ah_macRev, freq_mhz, ch);
310 ar9300_configure_spectral_scan(struct ath_hal *ah, HAL_SPECTRAL_PARAM *ss)
313 struct ath_hal_9300 *ahp = AH9300(ah);
317 if ((AR_SREV_WASP(ah) || AR_SREV_SCORPION(ah)) && asleep) {
318 ar9300_set_power_mode(ah, HAL_PM_AWAKE, AH_TRUE);
321 ar9300_prep_spectral_scan(ah);
327 ar9300_load_nf(ah, nf_buf);
329 ar9300_disable_strong_signal(ah);
330 ar9300_disable_weak_signal(ah);
331 ar9300_set_radar_dc_thresh(ah);
332 ar9300_set_cca_threshold(ah, MAX_CCA_THRESH);
333 /*ar9300_disable_restart(ah);*/
337 val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
381 OS_REG_WRITE(ah, AR_PHY_SPECTRAL_SCAN, val | AR_PHY_SPECTRAL_SCAN_ENABLE);
383 if ((AR_SREV_WASP(ah) || AR_SREV_SCORPION(ah)) && asleep) {
384 ar9300_set_power_mode(ah, HAL_PM_FULL_SLEEP, AH_TRUE);
394 ar9300_get_spectral_params(struct ath_hal *ah, HAL_SPECTRAL_PARAM *ss)
400 struct ath_hal_9300 *ahp = AH9300(ah);
403 c = AH_PRIVATE(ah)->ah_curchan;
405 chan = ath_hal_checkchannel(ah, c);
408 if ((AR_SREV_WASP(ah) || AR_SREV_SCORPION(ah)) && asleep) {
409 ar9300_set_power_mode(ah, HAL_PM_AWAKE, AH_TRUE);
412 val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
424 rx_chain_status = OS_REG_READ(ah, AR_PHY_RX_CHAINMASK) & 0x7;
429 ar9300_noise_floor_get(ah, chan->channel, ichain);
431 ar9300_noise_floor_power_get(ah, chan->channel, ichain);
434 ss->ss_nf_temp_data = OS_REG_READ_FIELD(ah, AR_PHY_BB_THERM_ADC_4, AR_PHY_BB_THERM_ADC_4_LATEST_THERM);
440 if ((AR_SREV_WASP(ah) || AR_SREV_SCORPION(ah)) && asleep) {
441 ar9300_set_power_mode(ah, HAL_PM_FULL_SLEEP, AH_TRUE);
446 ar9300_is_spectral_active(struct ath_hal *ah)
450 val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
455 ar9300_is_spectral_enabled(struct ath_hal *ah)
459 val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
463 void ar9300_start_spectral_scan(struct ath_hal *ah)
466 struct ath_hal_9300 *ahp = AH9300(ah);
469 if ((AR_SREV_WASP(ah) || AR_SREV_SCORPION(ah)) && asleep) {
470 ar9300_set_power_mode(ah, HAL_PM_AWAKE, AH_TRUE);
473 ar9300_prep_spectral_scan(ah);
476 val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
482 OS_REG_WRITE(ah, AR_PHY_SPECTRAL_SCAN, val);
483 val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
486 OS_REG_WRITE(ah, AR_PHY_SPECTRAL_SCAN, val);
489 val = OS_REG_READ(ah, AR_PHY_ERR_MASK_REG);
490 OS_REG_WRITE(ah, AR_PHY_ERR_MASK_REG, val | AR_PHY_ERR_RADAR);
492 if ((AR_SREV_WASP(ah) || AR_SREV_SCORPION(ah)) && asleep) {
493 ar9300_set_power_mode(ah, HAL_PM_FULL_SLEEP, AH_TRUE);
497 void ar9300_stop_spectral_scan(struct ath_hal *ah)
500 struct ath_hal_9300 *ahp = AH9300(ah);
503 if ((AR_SREV_WASP(ah) || AR_SREV_SCORPION(ah)) && asleep) {
504 ar9300_set_power_mode(ah, HAL_PM_AWAKE, AH_TRUE);
506 val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
514 OS_REG_WRITE(ah, AR_PHY_SPECTRAL_SCAN, val);
515 val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
517 OS_REG_RMW_FIELD(ah, AR_PHY_RADAR_1, AR_PHY_RADAR_1_CF_BIN_THRESH,
519 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING2, AR_PHY_TIMING2_DC_OFFSET,
521 OS_REG_WRITE(ah, AR_PHY_ERR, 0);
523 if (AH_PRIVATE(ah)->ah_curchan &&
524 IS_5GHZ_FAST_CLOCK_EN(ah, AH_PRIVATE(ah)->ah_curchan))
526 OS_REG_RMW_FIELD(ah, AR_PHY_MODE, AR_PHY_MODE_DISABLE_CCK,
530 val = OS_REG_READ(ah, AR_PHY_ERR);
532 val = OS_REG_READ(ah, AR_PHY_ERR_MASK_REG) & (~AR_PHY_ERR_RADAR);
533 OS_REG_WRITE(ah, AR_PHY_ERR_MASK_REG, val);
535 if ((AR_SREV_WASP(ah) || AR_SREV_SCORPION(ah)) && asleep) {
536 ar9300_set_power_mode(ah, HAL_PM_FULL_SLEEP, AH_TRUE);
540 u_int32_t ar9300_get_spectral_config(struct ath_hal *ah)
543 struct ath_hal_9300 *ahp = AH9300(ah);
546 if ((AR_SREV_WASP(ah) || AR_SREV_SCORPION(ah)) && asleep) {
547 ar9300_set_power_mode(ah, HAL_PM_AWAKE, AH_TRUE);
550 val = OS_REG_READ(ah, AR_PHY_SPECTRAL_SCAN);
552 if ((AR_SREV_WASP(ah) || AR_SREV_SCORPION(ah)) && asleep) {
553 ar9300_set_power_mode(ah, HAL_PM_FULL_SLEEP, AH_TRUE);
558 int16_t ar9300_get_ctl_chan_nf(struct ath_hal *ah)
562 struct ath_hal_private *ahpriv = AH_PRIVATE(ah);
565 if ( (OS_REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) == 0) {
567 nf = MS(OS_REG_READ(ah, AR_PHY_CCA_0), AR_PHY_MINCCA_PWR);
570 nf = AH9300(ah)->nfp->nominal;
578 int16_t ar9300_get_ext_chan_nf(struct ath_hal *ah)
582 struct ath_hal_private *ahpriv = AH_PRIVATE(ah);
585 if ((OS_REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) == 0) {
587 nf = MS(OS_REG_READ(ah, AR_PHY_EXT_CCA), AR_PHY_EXT_MINCCA_PWR);
590 nf = AH9300(ah)->nfp->nominal;