ath_hal/ar9300/ar9300_phy.c

19 #include "ah.h"
45 static inline void ar9300_init_rate_txpower_cck(struct ath_hal *ah,
47 static inline void ar9300_init_rate_txpower_ofdm(struct ath_hal* ah,
50 static inline void ar9300_init_rate_txpower_ht(struct ath_hal *ah,
54 static inline void ar9300_init_rate_txpower_stbc(struct ath_hal *ah,
58 static inline void ar9300_adjust_rate_txpower_cdd(struct ath_hal *ah,
308 ar9300_get_rate_table(struct ath_hal *ah, u_int mode)
310     struct ath_hal_private *ahpriv = AH_PRIVATE(ah);
356         HALDEBUG(ah, HAL_DEBUG_CHANNEL,
360     ath_hal_setupratetable(ah, rt);
394 ar9300_get_rate_txpower(struct ath_hal *ah, u_int mode, u_int8_t rate_index,
397     struct ath_hal_9300 *ahp = AH9300(ah);
409         HALDEBUG(ah, HAL_DEBUG_POWER_MGMT, "%s: invalid mode 0x%x\n",
419 ar9300_adjust_reg_txpower_cdd(struct ath_hal *ah,
423     struct ath_hal_9300 *ahp = AH9300(ah);
497         HALDEBUG(ah, HAL_DEBUG_POWER_MGMT, "%s: invalid chainmask 0x%x\n",
506 ar9300_init_rate_txpower(struct ath_hal *ah, u_int mode,
513     rt = ar9300_get_rate_table(ah, mode);
518         ar9300_init_rate_txpower_ofdm(ah, rt, power_per_rate,
524         ar9300_init_rate_txpower_ofdm(ah, rt, power_per_rate,
526         ar9300_init_rate_txpower_ht(ah, rt, is40, power_per_rate,
530         ar9300_init_rate_txpower_stbc(ah, rt, is40,
535         if (is_reg_dmn_fcc(ath_hal_getctl(ah, chan))) {
536             ar9300_adjust_rate_txpower_cdd(ah, rt, is40,
543         ar9300_init_rate_txpower_cck(ah, rt, power_per_rate, chainmask);
544         ar9300_init_rate_txpower_ofdm(ah, rt, power_per_rate,
548         ar9300_init_rate_txpower_cck(ah, rt, power_per_rate, chainmask);
553         ar9300_init_rate_txpower_cck(ah, rt, power_per_rate,  chainmask);
554         ar9300_init_rate_txpower_ofdm(ah, rt, power_per_rate,
556         ar9300_init_rate_txpower_ht(ah, rt, is40, power_per_rate,
560         ar9300_init_rate_txpower_stbc(ah, rt, is40,
565         if (is_reg_dmn_fcc(ath_hal_getctl(ah, chan))) {
566             ar9300_adjust_rate_txpower_cdd(ah, rt, is40,
573         HALDEBUG(ah, HAL_DEBUG_POWER_MGMT, "%s: invalid mode 0x%x\n",
582 ar9300_init_rate_txpower_cck(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
585     struct ath_hal_9300 *ahp = AH9300(ah);
617         HALDEBUG(ah, HAL_DEBUG_POWER_MGMT, "%s: invalid chainmask 0x%x\n",
624 ar9300_init_rate_txpower_ofdm(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
628     struct ath_hal_9300 *ahp = AH9300(ah);
686             HALDEBUG(ah, HAL_DEBUG_POWER_MGMT, "%s: invalid chainmask 0x%x\n",
750 ar9300_init_rate_txpower_ht(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
757     struct ath_hal_9300 *ahp = AH9300(ah);
778             HALDEBUG(ah, HAL_DEBUG_POWER_MGMT, "%s: invalid chainmask 0x%x\n",
801             HALDEBUG(ah, HAL_DEBUG_POWER_MGMT, "%s: invalid chainmask 0x%x\n",
824             HALDEBUG(ah, HAL_DEBUG_POWER_MGMT, "%s: invalid chainmask 0x%x\n",
833 ar9300_init_rate_txpower_stbc(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
839     struct ath_hal_9300 *ahp = AH9300(ah);
867         HALDEBUG(ah, HAL_DEBUG_POWER_MGMT, "%s: invalid chainmask 0x%x\n",
890             HALDEBUG(ah, HAL_DEBUG_POWER_MGMT, "%s: invalid chainmask 0x%x\n",
914             HALDEBUG(ah, HAL_DEBUG_POWER_MGMT, "%s: invalid chainmask 0x%x\n",
934             HALDEBUG(ah, HAL_DEBUG_POWER_MGMT, "%s: invalid chainmask 0x%x\n",
945 ar9300_adjust_rate_txpower_cdd(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
951     struct ath_hal_9300 *ahp = AH9300(ah);
985         HALDEBUG(ah, HAL_DEBUG_POWER_MGMT, "%s: invalid chainmask 0x%x\n",
1010             HALDEBUG(ah, HAL_DEBUG_POWER_MGMT, "%s: invalid chainmask 0x%x\n",
1030             HALDEBUG(ah, HAL_DEBUG_POWER_MGMT, "%s: invalid chainmask 0x%x\n",
1041 void ar9300_disp_tpc_tables(struct ath_hal *ah)
1043     struct ath_hal_9300 *ahp = AH9300(ah);
1044     const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan;
1045     u_int mode = ath_hal_get_curmode(ah, chan);
1050     if (!ah->ah_config.ath_hal_desc_tpc) {
1051         ath_hal_printf(ah, "\n TPC Register method in use\n");
1055     rt = ar9300_get_rate_table(ah, mode);
1058     ath_hal_printf(ah, "\n===TARGET POWER TABLE===\n");
1063             ath_hal_printf(ah, " Index[%2d] Rate[0x%02x] %6d kbps "
1069     ath_hal_printf(ah, "\n");
1071     ath_hal_printf(ah, "\n\n===TARGET POWER TABLE with STBC===\n");
1084             ath_hal_printf(ah, " Index[%2d] Rate[0x%02x] %6d kbps "
1090     ath_hal_printf(ah, "\n");
1112 u_int8_t *ar9300_get_tpc_tables(struct ath_hal *ah)
1114     struct ath_hal_9300 *ahp = AH9300(ah);
1115     const struct ieee80211_channel *chan = AH_PRIVATE(ah)->ah_curchan;
1116     u_int mode = ath_hal_get_curmode(ah, chan);
1123     if (! ah->ah_config.ath_hal_desc_tpc) {
1124         ath_hal_printf(ah, "\n TPC Register method in use\n");
1128     rt = (const HAL_RATE_TABLE *)ar9300_get_rate_table(ah, mode);
1185 ath_hal_get_rate_power_limit_from_eeprom(struct ath_hal *ah, u_int16_t freq,
1191     if (ah->ah_magic == AR9300_MAGIC) {
1198         ar9300_set_target_power_from_eeprom(ah, freq, target_rate_power_limit_val_t2);