acpica/include/actbl.h

217     UINT8                   Revision;                           /* ACPI Specification minor version number */
218     UINT8                   Checksum;                           /* To make sum of entire table == 0 */
240     UINT8                   SpaceId;                /* Address space where struct or register exists */
241     UINT8                   BitWidth;               /* Size in bits of given register */
242     UINT8                   BitOffset;              /* Bit offset within the register */
243     UINT8                   AccessWidth;            /* Minimum Access size (ACPI 3.0) */
259     UINT8                   Checksum;                   /* ACPI 1.0 checksum */
261     UINT8                   Revision;                   /* Must be (0) for ACPI 1.0 or (2) for ACPI 2.0+ */
265     UINT8                   ExtendedChecksum;           /* Checksum of entire table (ACPI 2.0+) */
266     UINT8                   Reserved[3];                /* Reserved, must be zero */
275     UINT8                   Checksum;
277     UINT8                   Revision;
288     UINT8                   ExtendedChecksum;
289     UINT8                   Reserved[3];
334     UINT8                   Version;                /* Version of this table (ACPI 2.0+) */
335     UINT8                   Reserved[3];            /* Reserved, must be zero */
337     UINT8                   Reserved1[24];          /* Reserved, must be zero */
370     UINT8                   Model;              /* System Interrupt Model (ACPI 1.0) - not used in ACPI 2.0+ */
371     UINT8                   PreferredProfile;   /* Conveys preferred power management profile to OSPM. */
374     UINT8                   AcpiEnable;         /* Value to write to SMI_CMD to enable ACPI */
375     UINT8                   AcpiDisable;        /* Value to write to SMI_CMD to disable ACPI */
376     UINT8                   S4BiosRequest;      /* Value to write to SMI_CMD to enter S4BIOS state */
377     UINT8                   PstateControl;      /* Processor performance state control*/
386     UINT8                   Pm1EventLength;     /* Byte Length of ports at Pm1xEventBlock */
387     UINT8                   Pm1ControlLength;   /* Byte Length of ports at Pm1xControlBlock */
388     UINT8                   Pm2ControlLength;   /* Byte Length of ports at Pm2ControlBlock */
389     UINT8                   PmTimerLength;      /* Byte Length of ports at PmTimerBlock */
390     UINT8                   Gpe0BlockLength;    /* Byte Length of ports at Gpe0Block */
391     UINT8                   Gpe1BlockLength;    /* Byte Length of ports at Gpe1Block */
392     UINT8                   Gpe1Base;           /* Offset in GPE number space where GPE1 events start */
393     UINT8                   CstControl;         /* Support for the _CST object and C-States change notification */
398     UINT8                   DutyOffset;         /* Processor duty cycle index in processor P_CNT reg */
399     UINT8                   DutyWidth;          /* Processor duty cycle value bit width in P_CNT register */
400     UINT8                   DayAlarm;           /* Index to day-of-month alarm in RTC CMOS RAM */
401     UINT8                   MonthAlarm;         /* Index to month-of-year alarm in RTC CMOS RAM */
402     UINT8                   Century;            /* Index to century in RTC CMOS RAM */
404     UINT8                   Reserved;           /* Reserved, must be zero */
407     UINT8                   ResetValue;         /* Value to write to the ResetRegister port to reset the system */
409     UINT8                   MinorRevision;      /* FADT Minor Revision (ACPI 5.1) */
515     UINT8                           Flags;