Lines Matching refs:WR4
77 #define WR4(sc, off, val) (bus_write_4((sc)->mem_res, (off), (val)))
116 WR4(sc, ZY7_SLCR_UNLOCK, ZY7_SLCR_UNLOCK_MAGIC);
124 WR4(sc, ZY7_SLCR_LOCK, ZY7_SLCR_LOCK_MAGIC);
138 WR4(sc, ZY7_SLCR_REBOOT_STAT,
142 WR4(sc, ZY7_SLCR_PSS_RST_CTRL, ZY7_SLCR_PSS_RST_CTRL_SOFT_RESET);
165 WR4(sc, ZY7_SLCR_FPGA_RST_CTRL, ZY7_SLCR_FPGA_RST_CTRL_RST_ALL);
168 WR4(sc, ZY7_SLCR_LVL_SHFTR_EN, 0);
196 WR4(sc, ZY7_SLCR_LVL_SHFTR_EN, ZY7_SLCR_LVL_SHFTR_EN_ALL);
199 WR4(sc, ZY7_SLCR_FPGA_RST_CTRL, 0);
241 WR4(sc, unit ? ZY7_SLCR_GEM1_CLK_CTRL : ZY7_SLCR_GEM0_CLK_CTRL,
276 WR4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit), reg);
368 WR4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit), reg);
447 WR4(sc, ZY7_SLCR_FPGA_THR_CTRL(unit), 0);
448 WR4(sc, ZY7_SLCR_FPGA_THR_CNT(unit), 0);
471 WR4(sc, ZY7_SLCR_FPGA_THR_CTRL(unit), 0);
472 WR4(sc, ZY7_SLCR_FPGA_THR_CNT(unit), 1);
525 WR4(sc, ZY7_SLCR_LVL_SHFTR_EN, ZY7_SLCR_LVL_SHFTR_EN_ALL);
540 WR4(sc, ZY7_SLCR_LVL_SHFTR_EN, 0);