Lines Matching defs:uint32_t
40 uint32_t sam:1; /* Source address mode */
41 uint32_t dam:1; /* Destination address mode */
42 uint32_t syncdim:1; /* Transfer synchronization dimension */
43 uint32_t static_set:1; /* Static Set */
44 uint32_t :4;
45 uint32_t fwid:3; /* FIFO Width */
46 uint32_t tccmode:1; /* Transfer complete code mode */
47 uint32_t tcc:6; /* Transfer complete code */
48 uint32_t :2;
49 uint32_t tcinten:1; /* Transfer complete interrupt enable */
50 uint32_t itcinten:1; /* Intermediate xfer completion intr. ena */
51 uint32_t tcchen:1; /* Transfer complete chaining enable */
52 uint32_t itcchen:1; /* Intermediate xfer completion chaining ena */
53 uint32_t privid:4; /* Privilege identification */
54 uint32_t :3;
55 uint32_t priv:1; /* Privilege level */
57 uint32_t src; /* Channel Source Address */
60 uint32_t dst; /* Channel Destination Address */