ti/cpsw/if_cpsw.c

375 #define	cpsw_cpdma_bd_paddr(sc, slot)					\
376 	BUS_SPACE_PHYSADDR(sc->mem_res, slot->bd_offset)
377 #define	cpsw_cpdma_read_bd(sc, slot, val)				\
378 	bus_read_region_4(sc->mem_res, slot->bd_offset, (uint32_t *) val, 4)
379 #define	cpsw_cpdma_write_bd(sc, slot, val)				\
380 	bus_write_region_4(sc->mem_res, slot->bd_offset, (uint32_t *) val, 4)
381 #define	cpsw_cpdma_write_bd_next(sc, slot, next_slot)			\
382 	cpsw_write_4(sc, slot->bd_offset, cpsw_cpdma_bd_paddr(sc, next_slot))
383 #define	cpsw_cpdma_write_bd_flags(sc, slot, val)			\
384 	bus_write_2(sc->mem_res, slot->bd_offset + 14, val)
385 #define	cpsw_cpdma_read_bd_flags(sc, slot)				\
386 	bus_read_2(sc->mem_res, slot->bd_offset + 14)
387 #define	cpsw_write_hdp_slot(sc, queue, slot)				\
388 	cpsw_write_4(sc, (queue)->hdp_offset, cpsw_cpdma_bd_paddr(sc, slot))
394 #define	cpsw_write_cp_slot(sc, queue, slot)				\
395 	cpsw_write_cp(sc, queue, cpsw_cpdma_bd_paddr(sc, slot))
400 cpsw_write_hdp_slotX(struct cpsw_softc *sc, struct cpsw_queue *queue, struct cpsw_slot *slot)
403 	uint32_t v = cpsw_cpdma_bd_paddr(sc, slot);
409 cpsw_write_cp_slotX(struct cpsw_softc *sc, struct cpsw_queue *queue, struct cpsw_slot *slot)
411 	uint32_t v = cpsw_cpdma_bd_paddr(sc, slot);
421 cpsw_dump_slot(struct cpsw_softc *sc, struct cpsw_slot *slot)
431 	cpsw_cpdma_read_bd(sc, slot, &bd);
433 	    cpsw_cpdma_bd_paddr(sc, slot), bd.next);
445 	if (slot->mbuf) {
447 		    (char *)(slot->mbuf->m_data), " ");
449 		    (char *)(slot->mbuf->m_data) + 14, " ");
453 #define	CPSW_DUMP_SLOT(cs, slot) do {				\
455 		cpsw_dump_slot(sc, slot);			\
462 	struct cpsw_slot *slot;
466 	STAILQ_FOREACH(slot, q, next) {
470 			cpsw_dump_slot(sc, slot);
487 	struct cpsw_slot *slot;
492 	/* Put the slot descriptors onto the global avail list. */
494 		slot = &sc->_slots[i];
495 		slot->bd_offset = cpsw_cpdma_bd_offset(i);
496 		STAILQ_INSERT_TAIL(&sc->avail, slot, next);
504 	struct cpsw_slot *slot;
511 		slot = STAILQ_FIRST(&sc->avail);
512 		if (slot == NULL)
514 		if (bus_dmamap_create(sc->mbuf_dtag, 0, &slot->dmamap)) {
519 		STAILQ_INSERT_TAIL(&queue->avail, slot, next);
527 cpsw_free_slot(struct cpsw_softc *sc, struct cpsw_slot *slot)
531 	if (slot->dmamap) {
532 		if (slot->mbuf)
533 			bus_dmamap_unload(sc->mbuf_dtag, slot->dmamap);
534 		error = bus_dmamap_destroy(sc->mbuf_dtag, slot->dmamap);
536 		slot->dmamap = NULL;
538 	if (slot->mbuf) {
539 		m_freem(slot->mbuf);
540 		slot->mbuf = NULL;
602 	struct cpsw_slot *slot;
668 	slot = STAILQ_FIRST(&sc->tx.active);
669 	if (slot != NULL)
670 		cpsw_write_hdp_slot(sc, &sc->tx, slot);
671 	slot = STAILQ_FIRST(&sc->rx.active);
672 	if (slot != NULL)
673 		cpsw_write_hdp_slot(sc, &sc->rx, slot);
1588 	struct cpsw_slot *last, *slot;
1601 	while ((slot = STAILQ_FIRST(&sc->rx.active)) != NULL) {
1602 		cpsw_cpdma_read_bd(sc, slot, &bd);
1613 		last = slot;
1616 		STAILQ_INSERT_TAIL(&sc->rx.avail, slot, next);
1618 		bus_dmamap_sync(sc->mbuf_dtag, slot->dmamap, BUS_DMASYNC_POSTREAD);
1619 		bus_dmamap_unload(sc->mbuf_dtag, slot->dmamap);
1621 		m = slot->mbuf;
1622 		slot->mbuf = NULL;
1715 	struct cpsw_slot *first_new_slot, *last_old_slot, *next, *slot;
1721 	while ((slot = STAILQ_FIRST(&sc->rx.avail)) != NULL) {
1723 			first_new_slot = slot;
1724 		if (slot->mbuf == NULL) {
1725 			slot->mbuf = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
1726 			if (slot->mbuf == NULL) {
1731 			slot->mbuf->m_len =
1732 			    slot->mbuf->m_pkthdr.len =
1733 			    slot->mbuf->m_ext.ext_size;
1736 		error = bus_dmamap_load_mbuf_sg(sc->mbuf_dtag, slot->dmamap,
1737 		    slot->mbuf, seg, &nsegs, BUS_DMA_NOWAIT);
1745 			bus_dmamap_unload(sc->mbuf_dtag, slot->dmamap);
1746 			m_freem(slot->mbuf);
1747 			slot->mbuf = NULL;
1751 		bus_dmamap_sync(sc->mbuf_dtag, slot->dmamap, BUS_DMASYNC_PREREAD);
1754 		if ((next = STAILQ_NEXT(slot, next)) != NULL)
1763 		cpsw_cpdma_write_bd(sc, slot, &bd);
1767 		STAILQ_INSERT_TAIL(&sc->rx.active, slot, next);
1826 	struct cpsw_slot *first_new_slot, *last, *last_old_slot, *next, *slot;
1834 	while ((slot = STAILQ_FIRST(&sc->swsc->tx.avail)) != NULL) {
1839 		slot->mbuf = m0;
1844 			m_append(slot->mbuf, padlen, sc->swsc->nullpad);
1848 		    slot->dmamap, slot->mbuf, segs, &nsegs, BUS_DMA_NOWAIT);
1852 			bus_dmamap_unload(sc->swsc->mbuf_dtag, slot->dmamap);
1853 			m0 = m_defrag(slot->mbuf, M_NOWAIT);
1857 				m_freem(slot->mbuf);
1863 			slot->mbuf = NULL;
1870 			bus_dmamap_unload(sc->swsc->mbuf_dtag, slot->dmamap);
1871 			m_freem(slot->mbuf);
1872 			slot->mbuf = NULL;
1876 		bus_dmamap_sync(sc->swsc->mbuf_dtag, slot->dmamap,
1884 			first_new_slot = slot;
1888 			cpsw_cpdma_write_bd_next(sc->swsc, last, slot);
1890 		slot->ifp = sc->ifp;
1896 			next = STAILQ_NEXT(slot, next);
1904 		bd.pktlen = m_length(slot->mbuf, NULL);
1912 			cpsw_cpdma_write_bd(sc->swsc, slot, &bd);
1914 			STAILQ_INSERT_TAIL(&sc->swsc->tx.active, slot, next);
1915 			slot = STAILQ_FIRST(&sc->swsc->tx.avail);
1919 				next = STAILQ_NEXT(slot, next);
1932 		cpsw_cpdma_write_bd(sc->swsc, slot, &bd);
1934 		STAILQ_INSERT_TAIL(&sc->swsc->tx.active, slot, next);
1936 		last = slot;
1970 	struct cpsw_slot *slot, *last_removed_slot = NULL;
1975 	slot = STAILQ_FIRST(&sc->tx.active);
1976 	while (slot != NULL) {
1977 		flags = cpsw_cpdma_read_bd_flags(sc, slot);
1989 		bus_dmamap_sync(sc->mbuf_dtag, slot->dmamap, BUS_DMASYNC_POSTWRITE);
1990 		bus_dmamap_unload(sc->mbuf_dtag, slot->dmamap);
1991 		m_freem(slot->mbuf);
1992 		slot->mbuf = NULL;
1994 		if (slot->ifp) {
1996 				if_inc_counter(slot->ifp, IFCOUNTER_OPACKETS, 1);
1998 				if_inc_counter(slot->ifp, IFCOUNTER_OQDROPS, 1);
2002 		while (slot != NULL && slot->mbuf == NULL) {
2004 			STAILQ_INSERT_TAIL(&sc->tx.avail, slot, next);
2006 			last_removed_slot = slot;
2007 			slot = STAILQ_FIRST(&sc->tx.active);
2014 		if (slot != NULL && bd.next != 0 && (bd.flags &
2017 			cpsw_write_hdp_slot(sc, &sc->tx, slot);