arm/nvidia/tegra_sdhci.c

118 RD4(struct tegra_sdhci_softc *sc, bus_size_t off)
121 	return (bus_read_4(sc->mem_res, off));
127 	struct tegra_sdhci_softc *sc;
129 	sc = device_get_softc(dev);
130 	return (bus_read_1(sc->mem_res, off));
136 	struct tegra_sdhci_softc *sc;
138 	sc = device_get_softc(dev);
139 	return (bus_read_2(sc->mem_res, off));
145 	struct tegra_sdhci_softc *sc;
148 	sc = device_get_softc(dev);
149 	val32 = bus_read_4(sc->mem_res, off);
151 	if (off == SDHCI_PRESENT_STATE && sc->force_card_present)
160 	struct tegra_sdhci_softc *sc;
162 	sc = device_get_softc(dev);
163 	bus_read_multi_4(sc->mem_res, off, data, count);
170 	struct tegra_sdhci_softc *sc;
172 	sc = device_get_softc(dev);
173 	bus_write_1(sc->mem_res, off, val);
180 	struct tegra_sdhci_softc *sc;
182 	sc = device_get_softc(dev);
183 	bus_write_2(sc->mem_res, off, val);
190 	struct tegra_sdhci_softc *sc;
192 	sc = device_get_softc(dev);
193 	bus_write_4(sc->mem_res, off, val);
200 	struct tegra_sdhci_softc *sc;
202 	sc = device_get_softc(dev);
203 	bus_write_multi_4(sc->mem_res, off, data, count);
209 	struct tegra_sdhci_softc *sc = arg;
211 	sdhci_generic_intr(&sc->slot);
212 	RD4(sc, SDHCI_INT_STATUS);
218 	struct tegra_sdhci_softc *sc = device_get_softc(brdev);
220 	return (sdhci_fdt_gpio_get_readonly(sc->gpio));
226 	struct tegra_sdhci_softc *sc = device_get_softc(dev);
228 	return (sdhci_fdt_gpio_get_present(sc->gpio));
234 	struct tegra_sdhci_softc *sc;
239 	sc = device_get_softc(dev);
255 		sc->quirks = cid;
257 		sc->max_clk = cid;
265 	struct tegra_sdhci_softc *sc;
270 	sc = device_get_softc(dev);
271 	sc->dev = dev;
275 	sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
277 	if (!sc->mem_res) {
284 	sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
286 	if (!sc->irq_res) {
292 	if (bus_setup_intr(dev, sc->irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
293 	    NULL, tegra_sdhci_intr, sc, &sc->intr_cookie)) {
299 	rv = hwreset_get_by_ofw_name(sc->dev, 0, "sdhci", &sc->reset);
301 		device_printf(sc->dev, "Cannot get 'sdhci' reset\n");
304 	rv = hwreset_deassert(sc->reset);
310 	gpio_pin_get_by_ofw_property(sc->dev, node, "power-gpios", &sc->gpio_power);
312 	rv = clk_get_by_ofw_index(dev, 0, 0, &sc->clk);
319 	rv = clk_get_by_ofw_index(dev, 0, 0, &sc->clk);
324 	rv = clk_enable(sc->clk);
329 	rv = clk_set_freq(sc->clk, 48000000, CLK_SET_ROUND_DOWN);
333 	rv = clk_get_freq(sc->clk, &freq);
342 	sc->max_clk = (int)freq;
343 	sc->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
348 	sc->caps = RD4(sc, SDHCI_CAPABILITIES);
350 		sc->caps &= ~(MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA);
353 			sc->caps |= MMC_CAP_8_BIT_DATA;
356 			sc->caps |= MMC_CAP_4_BIT_DATA;
366 		sc->force_card_present = 1;
369 	 * in sc->slot.max_clk
371 	sc->caps &= ~SDHCI_CLOCK_V3_BASE_MASK;
373 	sc->slot.quirks = sc->quirks;
374 	sc->slot.max_clk = sc->max_clk;
375 	sc->slot.caps = sc->caps;
377 	rv = sdhci_init_slot(dev, &sc->slot, 0);
382 	sc->gpio = sdhci_fdt_gpio_setup(sc->dev, &sc->slot);
387 	sdhci_start_slot(&sc->slot);
392 	if (sc->gpio != NULL)
393 		sdhci_fdt_gpio_teardown(sc->gpio);
394 	if (sc->intr_cookie != NULL)
395 		bus_teardown_intr(dev, sc->irq_res, sc->intr_cookie);
396 	if (sc->gpio_power != NULL)
397 		gpio_pin_release(sc->gpio_power);
398 	if (sc->clk != NULL)
399 		clk_release(sc->clk);
400 	if (sc->reset != NULL)
401 		hwreset_release(sc->reset);
402 	if (sc->irq_res != NULL)
403 		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->irq_res);
404 	if (sc->mem_res != NULL)
405 		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res);
413 	struct tegra_sdhci_softc *sc = device_get_softc(dev);
414 	struct sdhci_slot *slot = &sc->slot;
417 	sdhci_fdt_gpio_teardown(sc->gpio);
418 	clk_release(sc->clk);
419 	bus_teardown_intr(dev, sc->irq_res, sc->intr_cookie);
420 	bus_release_resource(dev, SYS_RES_IRQ, rman_get_rid(sc->irq_res),
421 			     sc->irq_res);
425 			     rman_get_rid(sc->mem_res),
426 			     sc->mem_res);