nvidia/tegra124/tegra124_xusbpadctl.c

217 				    struct padctl_port *port);
227 static int usb3_port_init(struct padctl_softc *sc, struct padctl_port *port);
307 	struct padctl_port	*port;
336 /* Define all possible mappings for USB3 port lanes */
349 	LANE_MAP(0, PADCTL_PAD_PCIE, 0), 	/* port USB3-0 -> lane PCIE-0 */
350 	LANE_MAP(1, PADCTL_PAD_PCIE, 1), 	/* port USB3-1 -> lane PCIE-1 */
352 	LANE_MAP(1, PADCTL_PAD_SATA, 0), 	/* port USB3-1 -> lane SATA-0 */
372 usb3_port_init(struct padctl_softc *sc, struct padctl_port *port)
377 	if (port->internal)
378 		reg &= ~SS_PORT_MAP_PORT_INTERNAL(port->idx);
380 		reg |= SS_PORT_MAP_PORT_INTERNAL(port->idx);
381 	reg &= ~SS_PORT_MAP_PORT_MAP(port->idx, ~0);
382 	reg |= SS_PORT_MAP_PORT_MAP(port->idx, port->companion);
385 	reg = RD4(sc, XUSB_PADCTL_IOPHY_USB3_PAD_CTL2(port->idx));
392 	WR4(sc, XUSB_PADCTL_IOPHY_USB3_PAD_CTL2(port->idx), reg);
394 	WR4(sc, XUSB_PADCTL_IOPHY_USB3_PAD_CTL4(port->idx),
398 	reg &= ~ELPG_PROGRAM_SSP_ELPG_VCORE_DOWN(port->idx);
403 	reg &= ~ELPG_PROGRAM_SSP_ELPG_CLAMP_EN_EARLY(port->idx);
408 	reg &= ~ELPG_PROGRAM_SSP_ELPG_CLAMP_EN(port->idx);
556 	struct padctl_port *port;
559 	port = search_lane_port(sc, lane);
560 	if (port == NULL) {
561 		device_printf(sc->dev, "Cannot find port for lane: %s\n",
605 	if (port != NULL && port->supply_vbus != NULL) {
606 		rv = regulator_enable(port->supply_vbus);
624 	struct padctl_port *port;
627 	port = search_lane_port(sc, lane);
628 	if (port == NULL) {
629 		device_printf(sc->dev, "Cannot find port for lane: %s\n",
636 	if (port != NULL && port->supply_vbus != NULL) {
637 		rv = regulator_enable(port->supply_vbus);
990 	struct padctl_port *port;
997 		device_printf(sc->dev, "Cannot read port name.\n");
1001 	port = search_port(sc, name);
1002 	if (port == NULL) {
1003 		device_printf(sc->dev, "Unknown port: %s\n", name);
1008 	if (port->type == PADCTL_PORT_USB3) {
1010 		   &(port->companion), sizeof(port->companion));
1014 			    "for port: %s\n", name);
1022 		    "vbus-supply", &port->supply_vbus);
1026 			    "for port: %s\n", name);
1033 		port->internal = true;
1035 	if (port->lane == NULL) {
1036 		switch(port->type) {
1039 			port->lane = search_pad_lane(sc, PADCTL_PAD_USB2,
1040 			    port->idx);
1043 			port->lane = search_pad_lane(sc, PADCTL_PAD_ULPI,
1044 			    port->idx);
1047 			port->lane = search_pad_lane(sc, PADCTL_PAD_HSIC,
1048 			    port->idx);
1051 			port->lane = search_usb3_pad_lane(sc, port->idx);
1055 	if (port->lane == NULL) {
1056 		device_printf(sc->dev, "Cannot find lane for port: %s\n", name);
1060 	port->enabled = true;
1150 	struct padctl_port *port;
1184 		port = ports_tbl + i;
1185 		if (!port->enabled)
1187 		if (port->init == NULL)
1189 		rv = port->init(sc, port);
1191 			device_printf(dev, "Cannot init port '%s'\n",
1192 			    port->name);