Lines Matching refs:fdtbus_bs_tag
262 return (bus_space_read_4(fdtbus_bs_tag, MV_CPU_CONTROL_BASE, reg));
269 bus_space_write_4(fdtbus_bs_tag, MV_CPU_CONTROL_BASE, reg, val);
277 return (bus_space_read_4(fdtbus_bs_tag, MV_MP_CLOCKS_BASE, reg));
284 bus_space_write_4(fdtbus_bs_tag, MV_MP_CLOCKS_BASE, reg, val);
291 return (bus_space_read_4(fdtbus_bs_tag, MV_MISC_BASE, reg));
298 bus_space_write_4(fdtbus_bs_tag, MV_MISC_BASE, reg, val);
386 *dev = bus_space_read_4(fdtbus_bs_tag, MV_PCIE_BASE, 0) >> 16;
387 *rev = bus_space_read_4(fdtbus_bs_tag, MV_PCIE_BASE, 8) & 0xff;
679 mmap = bus_space_read_4(fdtbus_bs_tag, MV_DDR_CADR_BASE + (i * 0x10), 0);
690 mmap = bus_space_read_4(fdtbus_bs_tag, MV_DDR_CADR_BASE + (i * 0x10), 0);
725 bus_space_read_4(fdtbus_bs_tag, MV_INTREGS_BASE, 0));
1371 if ((bus_space_read_4(fdtbus_bs_tag, base, MV_PCIE_CONTROL)
2348 sar_high = bus_space_read_4(fdtbus_bs_tag, MV_MISC_BASE,
2350 sar_low = bus_space_read_4(fdtbus_bs_tag, MV_MISC_BASE,
2354 sar_low = bus_space_read_4(fdtbus_bs_tag, MV_MISC_BASE,