freescale/imx/imx_i2c.c

147 #define DEVICE_DEBUGF(sc, lvl, fmt, args...) \
148     if ((lvl) <= (sc)->debug) \
149         device_printf((sc)->dev, fmt, ##args)
151 #define DEBUGF(sc, lvl, fmt, args...) \
152     if ((lvl) <= (sc)->debug) \
209 i2c_write_reg(struct i2c_softc *sc, bus_size_t off, uint8_t val)
212 	bus_write_1(sc->res, off, val);
216 i2c_read_reg(struct i2c_softc *sc, bus_size_t off)
219 	return (bus_read_1(sc->res, off));
223 i2c_flag_set(struct i2c_softc *sc, bus_size_t off, uint8_t mask)
227 	status = i2c_read_reg(sc, off);
229 	i2c_write_reg(sc, off, status);
234 wait_for_busbusy(struct i2c_softc *sc, int wantbusy)
240 		srb = i2c_read_reg(sc, I2C_STATUS_REG) & I2CSR_MBB;
250 wait_for_xfer(struct i2c_softc *sc, int checkack)
262 	pause_sbt("imxi2c", sc->byte_time_sbt, sc->byte_time_sbt / 20, 0);
266 		sr = i2c_read_reg(sc, I2C_STATUS_REG);
288 i2c_error_handler(struct i2c_softc *sc, int error)
292 		i2c_write_reg(sc, I2C_STATUS_REG, 0);
293 		i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN);
294 		wait_for_busbusy(sc, false);
295 		i2c_write_reg(sc, I2C_CONTROL_REG, 0);
334 i2c_recover_bus(struct i2c_softc *sc)
345 	if (sc->rb_pinctl_idx == 0)
348 	fdt_pinctrl_configure(sc->dev, sc->rb_pinctl_idx);
350 	pins.ctx = sc;
357 	fdt_pinctrl_configure(sc->dev, 0);
381 	struct i2c_softc *sc;
385 	sc = device_get_softc(dev);
386 	sc->dev = dev;
387 	sc->rid = 0;
389 	sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->rid,
391 	if (sc->res == NULL) {
396 	sc->iicbus = device_add_child(dev, "iicbus", -1);
397 	if (sc->iicbus == NULL) {
403 	SYSCTL_ADD_INT(device_get_sysctl_ctx(sc->dev),
404 	    SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)),
405 	    OID_AUTO, "debug", CTLFLAG_RWTUN, &sc->debug, 0,
413 	node = ofw_bus_get_node(sc->dev);
416 	    &sc->rb_sclpin);
420 	    &sc->rb_sdapin);
429 	gpio_pin_setflags(sc->rb_sclpin, GPIO_PIN_OUTPUT);
430 	gpio_pin_setflags(sc->rb_sdapin, GPIO_PIN_OUTPUT);
431 	gpio_pin_set_active(sc->rb_sclpin, true);
432 	gpio_pin_set_active(sc->rb_sdapin, true);
437 	 * default pinctrl-0.  If sc->rb_pinctl_idx is non-zero, the reset code
444 			sc->rb_pinctl_idx = cfgidx;
459 	struct i2c_softc *sc;
462 	sc = device_get_softc(dev);
464 	if ((error = bus_generic_detach(sc->dev)) != 0) {
465 		device_printf(sc->dev, "cannot detach child devices\n");
469 	if (sc->iicbus != NULL)
470 		device_delete_child(dev, sc->iicbus);
472 	if (sc->res != NULL)
473 		bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->res);
481 	struct i2c_softc *sc;
484 	sc = device_get_softc(dev);
486 	if ((i2c_read_reg(sc, I2C_STATUS_REG) & I2CSR_MBB) == 0) {
494 	i2c_flag_set(sc, I2C_CONTROL_REG, I2CCR_RSTA);
496 	i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
497 	i2c_write_reg(sc, I2C_DATA_REG, slave);
498 	sc->slave = slave;
499 	DEVICE_DEBUGF(sc, 2, "rstart 0x%02x\n", sc->slave);
500 	error = wait_for_xfer(sc, true);
501 	return (i2c_error_handler(sc, error));
507 	struct i2c_softc *sc;
510 	sc = device_get_softc(dev);
512 	i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN);
514 	if (i2c_read_reg(sc, I2C_STATUS_REG) & I2CSR_MBB) {
515 		return (i2c_error_handler(sc, IIC_EBUSERR));
517 	i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_MSTA | I2CCR_MTX);
518 	if ((error = wait_for_busbusy(sc, true)) != IIC_NOERR)
519 		return (i2c_error_handler(sc, error));
520 	i2c_write_reg(sc, I2C_STATUS_REG, 0);
521 	i2c_write_reg(sc, I2C_DATA_REG, slave);
522 	sc->slave = slave;
523 	DEVICE_DEBUGF(sc, 2, "start  0x%02x\n", sc->slave);
524 	error = wait_for_xfer(sc, true);
525 	return (i2c_error_handler(sc, error));
531 	struct i2c_softc *sc;
534 	sc = device_get_softc(dev);
545 		i2c_write_reg(sc, I2C_CONTROL_REG, 0x0);
546 		if ((error = i2c_recover_bus(sc)) != 0)
556 	struct i2c_softc *sc;
558 	sc = device_get_softc(dev);
560 	i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN);
561 	wait_for_busbusy(sc, false);
562 	i2c_write_reg(sc, I2C_CONTROL_REG, 0);
563 	DEVICE_DEBUGF(sc, 2, "stop   0x%02x\n", sc->slave);
570 	struct i2c_softc *sc;
573 	sc = device_get_softc(dev);
575 	DEVICE_DEBUGF(sc, 1, "reset\n");
582 	busfreq = IICBUS_GET_FREQUENCY(sc->iicbus, speed);
597 	sc->byte_time_sbt = SBT_1US * (9000000 / busfreq);
602 	i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
603 	i2c_write_reg(sc, I2C_CONTROL_REG, 0x0);
604 	i2c_write_reg(sc, I2C_FDR_REG, (uint8_t)clkdiv_table[i].regcode);
610 	return (i2c_recover_bus(sc));
616 	struct i2c_softc *sc;
619 	sc = device_get_softc(dev);
622 	DEVICE_DEBUGF(sc, 1, "read   0x%02x len %d: ", sc->slave, len);
625 			i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
628 			i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
631 		i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
632 		i2c_read_reg(sc, I2C_DATA_REG);
638 		if ((error = wait_for_xfer(sc, false)) != IIC_NOERR)
640 		i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
644 				i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
648 				i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
650 				wait_for_busbusy(sc, false);
653 		reg = i2c_read_reg(sc, I2C_DATA_REG);
654 		DEBUGF(sc, 1, "0x%02x ", reg);
658 	DEBUGF(sc, 1, "\n");
660 	return (i2c_error_handler(sc, error));
666 	struct i2c_softc *sc;
669 	sc = device_get_softc(dev);
673 	DEVICE_DEBUGF(sc, 1, "write  0x%02x len %d: ", sc->slave, len);
675 		DEBUGF(sc, 1, "0x%02x ", *buf);
676 		i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
677 		i2c_write_reg(sc, I2C_DATA_REG, *buf++);
678 		if ((error = wait_for_xfer(sc, true)) != IIC_NOERR)
682 	DEBUGF(sc, 1, "\n");
683 	return (i2c_error_handler(sc, error));