freescale/imx/imx6_anatop.c

147 	KASSERT(imx6_anatop_sc != NULL, ("imx6_anatop_read_4 sc NULL"));
156 	KASSERT(imx6_anatop_sc != NULL, ("imx6_anatop_write_4 sc NULL"));
162 vdd_set(struct imx6_anatop_softc *sc, int mv)
226 	sc->cpu_curmv = newtarg * 25 + 700;
230 cpufreq_mhz_from_div(struct imx6_anatop_softc *sc, uint32_t corediv,
234 	return ((sc->refosc_mhz * (plldiv / 2)) / (corediv + 1));
238 cpufreq_mhz_to_div(struct imx6_anatop_softc *sc, uint32_t cpu_mhz,
243 	*plldiv = ((*corediv + 1) * cpu_mhz) / (sc->refosc_mhz / 2);
247 cpufreq_actual_mhz(struct imx6_anatop_softc *sc, uint32_t cpu_mhz)
251 	cpufreq_mhz_to_div(sc, cpu_mhz, &corediv, &plldiv);
252 	return (cpufreq_mhz_from_div(sc, corediv, plldiv));
256 cpufreq_nearest_oppt(struct imx6_anatop_softc *sc, uint32_t cpu_newmhz)
260 	if (cpu_newmhz > sc->cpu_maxmhz_hw && !sc->cpu_overclock_enable)
261 		cpu_newmhz = sc->cpu_maxmhz_hw;
276 cpufreq_set_clock(struct imx6_anatop_softc * sc, struct oppt *op)
281 	if (op->mhz > sc->cpu_curmhz) {
282 		vdd_set(sc, op->mv);
294 	cpufreq_mhz_to_div(sc, op->mhz, &corediv, &plldiv);
316 	if (op->mhz < sc->cpu_curmhz)
317 		vdd_set(sc, op->mv);
318 	sc->cpu_curmhz = op->mhz;
322 	    cpufreq_actual_mhz(sc, sc->cpu_curmhz) * 1000000 / 2);
328 	struct imx6_anatop_softc *sc;
333 	sc = arg1;
335 	temp = sc->cpu_minmhz;
340 	op = cpufreq_nearest_oppt(sc, temp);
341 	if (op->mhz > sc->cpu_maxmhz)
343 	else if (op->mhz == sc->cpu_minmhz)
350 	sc->cpu_minmhz = op->mhz;
351 	if (sc->cpu_minmhz > sc->cpu_curmhz) {
352 		cpufreq_set_clock(sc, op);
360 	struct imx6_anatop_softc *sc;
365 	sc = arg1;
367 	temp = sc->cpu_maxmhz;
372 	op = cpufreq_nearest_oppt(sc, temp);
373 	if (op->mhz < sc->cpu_minmhz)
375 	else if (op->mhz == sc->cpu_maxmhz)
384 	sc->cpu_maxmhz = op->mhz;
385 	cpufreq_set_clock(sc, op);
391 cpufreq_initialize(struct imx6_anatop_softc *sc)
397 	    OID_AUTO, "cpu_mhz", CTLFLAG_RD, &sc->cpu_curmhz, 0,
402 	    sc, 0, cpufreq_sysctl_minmhz, "IU", "Minimum CPU frequency");
406 	    sc, 0, cpufreq_sysctl_maxmhz, "IU", "Maximum CPU frequency");
409 	    OID_AUTO, "cpu_maxmhz_hw", CTLFLAG_RD, &sc->cpu_maxmhz_hw, 0,
414 	    &sc->cpu_overclock_enable, 0,
422 	sc->refosc_mhz = 24;
436 	sc->cpu_maxmhz_hw = imx6_ocotp_mhz_tab[cfg3speed];
437 	sc->cpu_maxmhz = sc->cpu_maxmhz_hw;
439 	TUNABLE_INT_FETCH("hw.imx6.cpu_minmhz", &sc->cpu_minmhz);
440 	op = cpufreq_nearest_oppt(sc, sc->cpu_minmhz);
441 	sc->cpu_minmhz = op->mhz;
442 	sc->cpu_minmv = op->mv;
444 	TUNABLE_INT_FETCH("hw.imx6.cpu_maxmhz", &sc->cpu_maxmhz);
445 	op = cpufreq_nearest_oppt(sc, sc->cpu_maxmhz);
446 	sc->cpu_maxmhz = op->mhz;
447 	sc->cpu_maxmv = op->mv;
457 	cpufreq_set_clock(sc, op);
461 temp_from_count(struct imx6_anatop_softc *sc, uint32_t count)
464 	return (((sc->temp_high_val - (count - sc->temp_high_cnt) *
465 	    (sc->temp_high_val - 250) /
466 	    (sc->temp_room_cnt - sc->temp_high_cnt))));
470 temp_to_count(struct imx6_anatop_softc *sc, uint32_t temp)
473 	return ((sc->temp_room_cnt - sc->temp_high_cnt) *
474 	    (sc->temp_high_val - temp) / (sc->temp_high_val - 250) +
475 	    sc->temp_high_cnt);
479 temp_update_count(struct imx6_anatop_softc *sc)
486 	sc->temp_last_cnt =
494 	struct imx6_anatop_softc *sc = arg1;
497 	temp_update_count(sc);
499 	t = temp_from_count(sc, sc->temp_last_cnt) + TZ_ZEROC;
507 	struct imx6_anatop_softc *sc = arg1;
511 	temp = sc->temp_throttle_val + TZ_ZEROC;
516 	if (err != 0 || req->newptr == NULL || temp == sc->temp_throttle_val)
520 	sc->temp_throttle_val = temp;
521 	sc->temp_throttle_trigger_cnt = temp_to_count(sc, sc->temp_throttle_val);
522 	sc->temp_throttle_reset_cnt = temp_to_count(sc, sc->temp_throttle_val - 100);
526 	    (sc->temp_throttle_trigger_cnt <<
532 tempmon_gofast(struct imx6_anatop_softc *sc)
535 	if (sc->cpu_curmhz < sc->cpu_maxmhz) {
536 		cpufreq_set_clock(sc, cpufreq_nearest_oppt(sc, sc->cpu_maxmhz));
541 tempmon_goslow(struct imx6_anatop_softc *sc)
544 	if (sc->cpu_curmhz > sc->cpu_minmhz) {
545 		cpufreq_set_clock(sc, cpufreq_nearest_oppt(sc, sc->cpu_minmhz));
552 	struct imx6_anatop_softc *sc = arg;
559 	tempmon_goslow(sc);
567 	struct imx6_anatop_softc *sc = arg;
570 	if (sc->temp_last_cnt < sc->temp_throttle_trigger_cnt)
571 		tempmon_goslow(sc);
572 	else if (sc->temp_last_cnt > (sc->temp_throttle_reset_cnt))
573 		tempmon_gofast(sc);
575 	callout_reset_sbt(&sc->temp_throttle_callout, sc->temp_throttle_delay,
576 		0, tempmon_throttle_check, sc, 0);
581 initialize_tempmon(struct imx6_anatop_softc *sc)
590 	sc->temp_room_cnt = (cal & 0xFFF00000) >> 20;
591 	sc->temp_high_cnt = (cal & 0x000FFF00) >> 8;
592 	sc->temp_high_val = (cal & 0x000000FF) * 10;
598 	sc->temp_throttle_val = sc->temp_high_val - 100;
599 	sc->temp_throttle_trigger_cnt =
600 	    temp_to_count(sc, sc->temp_throttle_val);
601 	sc->temp_throttle_reset_cnt =
602 	    temp_to_count(sc, sc->temp_throttle_val - 50);
610 	    (sc->temp_throttle_trigger_cnt <<
620 	while (sc->temp_last_cnt == 0)
621 		temp_update_count(sc);
622 	sc->temp_throttle_delay = 100 * SBT_1MS;
623 	callout_init(&sc->temp_throttle_callout, 0);
624 	callout_reset_sbt(&sc->temp_throttle_callout, sc->temp_throttle_delay,
625 	    0, tempmon_throttle_check, sc, 0);
628 	    OID_AUTO, "temperature", CTLTYPE_INT | CTLFLAG_RD, sc, 0,
631 	    OID_AUTO, "throttle_temperature", CTLTYPE_INT | CTLFLAG_RW, sc,
640 	struct imx6_anatop_softc *sc;
642 	sc = arg;
644 	sc->res[IRQRES] = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, &rid,
646 	if (sc->res[IRQRES] != NULL) {
647 		bus_setup_intr(sc->dev, sc->res[IRQRES],
648 		    INTR_TYPE_MISC | INTR_MPSAFE, tempmon_intr, NULL, sc,
649 		    &sc->temp_intrhand);
651 		device_printf(sc->dev, "Cannot allocate IRQ resource\n");
653 	config_intrhook_disestablish(&sc->intr_setup_hook);
659 	struct imx6_anatop_softc *sc;
668 	sc = device_get_softc(dev);
669 	if (!sc->cpu_init_done && bus_current_pass >= cpu_init_pass) {
670 		sc->cpu_init_done = true;
671 		cpufreq_initialize(sc);
672 		initialize_tempmon(sc);
674 			device_printf(sc->dev, "CPU %uMHz @ %umV\n",
675 			    sc->cpu_curmhz, sc->cpu_curmv);
692 	struct imx6_anatop_softc *sc;
695 	sc = device_get_softc(dev);
696 	sc->dev = dev;
699 	if (bus_alloc_resources(dev, imx6_anatop_spec, sc->res)) {
705 	sc->intr_setup_hook.ich_func = intr_setup;
706 	sc->intr_setup_hook.ich_arg = sc;
707 	config_intrhook_establish(&sc->intr_setup_hook);
709 	SYSCTL_ADD_UINT(device_get_sysctl_ctx(sc->dev),
710 	    SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)),
712 	    &sc->cpu_curmv, 0, "Current CPU voltage in millivolts");
714 	imx6_anatop_sc = sc;
736 		bus_release_resources(dev, imx6_anatop_spec, sc->res);