Lines Matching refs:freq

262 	u_int freq;
320 freq = imx51_get_clock(IMX51CLK_PLL1SW);
322 return freq / (cacrr + 1);
328 freq = imx51_get_clock(IMX51CLK_PLL2SW);
330 freq = 0;
335 freq = imx51_get_clock(IMX51CLK_PLL1SW);
338 freq = imx51_get_clock(IMX51CLK_PLL3SW);
341 freq = imx51_get_clock(IMX51CLK_LP_APM);
348 return freq;
350 freq = imx51_get_clock(IMX51CLK_MAIN_BUS_CLK_SRC);
352 return freq / (1 + ((cdcr & CDCR_PERIPH_CLK_DVFS_PODF_MASK) >>
355 freq = imx51_get_clock(IMX51CLK_MAIN_BUS_CLK);
357 return freq / (1 + ((cbcdr & CBCDR_AHB_PODF_MASK) >>
360 freq = imx51_get_clock(IMX51CLK_AHB_CLK_ROOT);
362 return freq / (1 + ((cbcdr & CBCDR_IPG_PODF_MASK) >>
370 freq = imx51_get_clock(IMX51CLK_LP_APM);
372 freq = imx51_get_clock(IMX51CLK_MAIN_BUS_CLK_SRC);
379 freq /= 1 + ((cbcdr & CBCDR_PERCLK_PRED1_MASK) >>
381 freq /= 1 + ((cbcdr & CBCDR_PERCLK_PRED2_MASK) >>
383 freq /= 1 + ((cbcdr & CBCDR_PERCLK_PODF_MASK) >>
385 return freq;
397 freq = 0; /* shut up GCC */
402 freq = imx51_get_clock(IMX51CLK_PLL1SW + sel);
405 freq = imx51_get_clock(IMX51CLK_LP_APM);
409 return freq / (1 + ((cscdr1 & CSCDR1_UART_CLK_PRED_MASK) >>
414 freq = 0;
419 freq = imx51_get_clock(IMX51CLK_ARM_AXI_A_CLK);
422 freq = imx51_get_clock(IMX51CLK_ARM_AXI_B_CLK);
425 freq = imx51_get_clock(
429 freq = imx51_get_clock(IMX51CLK_AHB_CLK_ROOT);
432 return freq;
453 uint64_t freq = 0;
502 freq = (int64_t)ref * mfi + (int64_t)ref * mfn / (mfd + 1);
503 freq /= pdf + 1;
506 freq /= 2;
515 printf("pll: %d\n", (uint32_t)freq);
518 ccm_softc->pll_freq[pll_no-1] = freq;
520 return (freq);