Lines Matching defs:sc
89 read_4(struct ece_softc *sc, bus_size_t off)
92 return (bus_read_4(sc->mem_res, off));
96 write_4(struct ece_softc *sc, bus_size_t off, uint32_t val)
99 bus_write_4(sc->mem_res, off, val);
161 static int ece_get_mac(struct ece_softc *sc, u_char *eaddr);
162 static void ece_set_mac(struct ece_softc *sc, u_char *eaddr);
163 static int configure_cpu_port(struct ece_softc *sc);
164 static int configure_lan_port(struct ece_softc *sc, int phy_type);
165 static void set_pvid(struct ece_softc *sc, int port0, int port1, int cpu);
166 static void set_vlan_vid(struct ece_softc *sc, int vlan);
167 static void set_vlan_member(struct ece_softc *sc, int vlan);
168 static void set_vlan_tag(struct ece_softc *sc, int vlan);
169 static int hardware_init(struct ece_softc *sc);
170 static void ece_intr_rx_locked(struct ece_softc *sc, int count);
172 static void ece_free_desc_dma_tx(struct ece_softc *sc);
173 static void ece_free_desc_dma_rx(struct ece_softc *sc);
179 static int ece_allocate_dma(struct ece_softc *sc);
191 phy_read(struct ece_softc *sc, int phy, int reg)
197 write_4(sc, PHY_CONTROL, PHY_RW_OK);
198 write_4(sc, PHY_CONTROL,
203 status = read_4(sc, PHY_CONTROL);
207 write_4(sc, PHY_CONTROL, PHY_RW_OK);
216 phy_write(struct ece_softc *sc, int phy, int reg, int data)
220 write_4(sc, PHY_CONTROL, PHY_RW_OK);
221 write_4(sc, PHY_CONTROL,
225 if (read_4(sc, PHY_CONTROL) & PHY_RW_OK) {
229 write_4(sc, PHY_CONTROL, PHY_RW_OK);
235 static int get_phy_type(struct ece_softc *sc)
243 phy0_id = phy_read(sc, 0, 0x2);
244 phy1_id = phy_read(sc, 1, 0x2);
270 struct ece_softc *sc;
281 sc = device_get_softc(dev);
283 sc->dev = dev;
286 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
288 if (sc->mem_res == NULL)
294 sc->irq_res_status = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
296 if (sc->irq_res_status == NULL)
301 sc->irq_res_tx = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
303 if (sc->irq_res_tx == NULL)
308 sc->irq_res_rec = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
310 if (sc->irq_res_rec == NULL)
315 sc->irq_res_qf = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
317 if (sc->irq_res_qf == NULL)
328 ECE_LOCK_INIT(sc);
330 callout_init_mtx(&sc->tick_ch, &sc->sc_mtx, 0);
332 if ((err = ece_get_mac(sc, eaddr)) != 0) {
355 ece_set_mac(sc, eaddr);
356 sc->ifp = ifp = if_alloc(IFT_ETHER);
358 err = mii_attach(dev, &sc->miibus, ifp, ece_ifmedia_upd,
364 ifp->if_softc = sc;
381 TASK_INIT(&sc->sc_intr_task, 0, ece_intr_task, sc);
382 TASK_INIT(&sc->sc_tx_task, 1, ece_tx_task, ifp);
383 TASK_INIT(&sc->sc_cleanup_task, 2, ece_cleanup_task, sc);
384 sc->sc_tq = taskqueue_create_fast("ece_taskq", M_WAITOK,
386 &sc->sc_tq);
387 if (sc->sc_tq == NULL) {
388 device_printf(sc->dev, "could not create taskqueue\n");
397 err = bus_setup_intr(dev, sc->irq_res_rec, INTR_TYPE_NET | INTR_MPSAFE,
398 NULL, ece_intr, sc, &sc->intrhand);
401 ECE_LOCK_DESTROY(sc);
405 err = bus_setup_intr(dev, sc->irq_res_status,
407 NULL, ece_intr_status, sc, &sc->intrhand_status);
410 ECE_LOCK_DESTROY(sc);
414 err = bus_setup_intr(dev, sc->irq_res_qf, INTR_TYPE_NET | INTR_MPSAFE,
415 NULL,ece_intr_qf, sc, &sc->intrhand_qf);
419 ECE_LOCK_DESTROY(sc);
423 err = bus_setup_intr(dev, sc->irq_res_tx, INTR_TYPE_NET | INTR_MPSAFE,
424 NULL, ece_intr_tx, sc, &sc->intrhand_tx);
428 ECE_LOCK_DESTROY(sc);
432 ECE_TXLOCK_INIT(sc);
433 ECE_RXLOCK_INIT(sc);
434 ECE_CLEANUPLOCK_INIT(sc);
437 write_4(sc, INTERRUPT_MASK, 0x00000000);
440 write_4(sc, PORT_0_CONFIG, read_4(sc, PORT_0_CONFIG) & ~(PORT_DISABLE));
442 taskqueue_start_threads(&sc->sc_tq, 1, PI_NET, "%s taskq",
443 device_get_nameunit(sc->dev));
456 struct ece_softc *sc = device_get_softc(dev);
457 struct ifnet *ifp = sc->ifp;
459 ecestop(sc);
478 ece_alloc_desc_dma_tx(struct ece_softc *sc)
484 error = bus_dma_tag_create(sc->sc_parent_tag, /* parent */
494 &sc->dmatag_data_tx); /* dmat */
497 error = bus_dmamem_alloc(sc->dmatag_data_tx,
498 (void**)&(sc->desc_tx),
501 &(sc->dmamap_ring_tx));
504 if_printf(sc->ifp, "failed to allocate DMA memory\n");
505 bus_dma_tag_destroy(sc->dmatag_data_tx);
506 sc->dmatag_data_tx = 0;
511 error = bus_dmamap_load(sc->dmatag_data_tx, sc->dmamap_ring_tx,
512 sc->desc_tx,
515 &(sc->ring_paddr_tx), BUS_DMA_NOWAIT);
518 if_printf(sc->ifp, "can't load descriptor\n");
519 bus_dmamem_free(sc->dmatag_data_tx, sc->desc_tx,
520 sc->dmamap_ring_tx);
521 sc->desc_tx = NULL;
522 bus_dma_tag_destroy(sc->dmatag_data_tx);
523 sc->dmatag_data_tx = 0;
528 error = bus_dma_tag_create(sc->sc_parent_tag, /* parent */
537 &sc->dmatag_ring_tx); /* dmat */
540 if_printf(sc->ifp, "failed to create busdma tag for mbufs\n");
546 error = bus_dmamap_create(sc->dmatag_ring_tx, 0,
547 &(sc->tx_desc[i].dmamap));
549 if_printf(sc->ifp, "failed to create map for mbuf\n");
557 ece_free_desc_dma_tx(struct ece_softc *sc)
562 if (sc->tx_desc[i].buff) {
563 m_freem(sc->tx_desc[i].buff);
564 sc->tx_desc[i].buff= 0;
568 if (sc->ring_paddr_tx) {
569 bus_dmamap_unload(sc->dmatag_data_tx, sc->dmamap_ring_tx);
570 sc->ring_paddr_tx = 0;
573 if (sc->desc_tx) {
574 bus_dmamem_free(sc->dmatag_data_tx,
575 sc->desc_tx, sc->dmamap_ring_tx);
576 sc->desc_tx = NULL;
579 if (sc->dmatag_data_tx) {
580 bus_dma_tag_destroy(sc->dmatag_data_tx);
581 sc->dmatag_data_tx = 0;
584 if (sc->dmatag_ring_tx) {
586 bus_dmamap_destroy(sc->dmatag_ring_tx,
587 sc->tx_desc[i].dmamap);
588 sc->tx_desc[i].dmamap = 0;
590 bus_dma_tag_destroy(sc->dmatag_ring_tx);
591 sc->dmatag_ring_tx = 0;
596 ece_alloc_desc_dma_rx(struct ece_softc *sc)
602 error = bus_dma_tag_create(sc->sc_parent_tag, /* parent */
612 &sc->dmatag_data_rx); /* dmat */
615 error = bus_dmamem_alloc(sc->dmatag_data_rx,
616 (void**)&(sc->desc_rx),
619 &(sc->dmamap_ring_rx));
622 if_printf(sc->ifp, "failed to allocate DMA memory\n");
627 error = bus_dmamap_load(sc->dmatag_data_rx, sc->dmamap_ring_rx,
628 sc->desc_rx,
631 &(sc->ring_paddr_rx), BUS_DMA_NOWAIT);
634 if_printf(sc->ifp, "can't load descriptor\n");
635 bus_dmamem_free(sc->dmatag_data_rx, sc->desc_rx,
636 sc->dmamap_ring_rx);
637 bus_dma_tag_destroy(sc->dmatag_data_rx);
638 sc->desc_rx = NULL;
643 error = bus_dma_tag_create(sc->sc_parent_tag,/* parent */
651 &sc->dmatag_ring_rx); /* dmat */
654 if_printf(sc->ifp, "failed to create busdma tag for mbufs\n");
659 error = bus_dmamap_create(sc->dmatag_ring_rx, 0,
660 &sc->rx_desc[i].dmamap);
662 if_printf(sc->ifp, "failed to create map for mbuf\n");
667 error = bus_dmamap_create(sc->dmatag_ring_rx, 0, &sc->rx_sparemap);
669 if_printf(sc->ifp, "failed to create spare map\n");
677 ece_free_desc_dma_rx(struct ece_softc *sc)
682 if (sc->rx_desc[i].buff) {
683 m_freem(sc->rx_desc[i].buff);
684 sc->rx_desc[i].buff = NULL;
688 if (sc->ring_paddr_rx) {
689 bus_dmamap_unload(sc->dmatag_data_rx, sc->dmamap_ring_rx);
690 sc->ring_paddr_rx = 0;
693 if (sc->desc_rx) {
694 bus_dmamem_free(sc->dmatag_data_rx, sc->desc_rx,
695 sc->dmamap_ring_rx);
696 sc->desc_rx = NULL;
699 if (sc->dmatag_data_rx) {
700 bus_dma_tag_destroy(sc->dmatag_data_rx);
701 sc->dmatag_data_rx = NULL;
704 if (sc->dmatag_ring_rx) {
706 bus_dmamap_destroy(sc->dmatag_ring_rx,
707 sc->rx_desc[i].dmamap);
708 bus_dmamap_destroy(sc->dmatag_ring_rx, sc->rx_sparemap);
709 bus_dma_tag_destroy(sc->dmatag_ring_rx);
710 sc->dmatag_ring_rx = NULL;
715 ece_new_rxbuf(struct ece_softc *sc, struct rx_desc_info* descinfo)
724 tag = sc->dmatag_ring_rx;
733 error = bus_dmamap_load_mbuf_sg(tag, sc->rx_sparemap, new_mbuf,
749 descinfo->dmamap = sc->rx_sparemap;
750 sc->rx_sparemap = map;
762 ece_allocate_dma(struct ece_softc *sc)
771 bus_get_dma_tag(sc->dev),/* parent */
780 &sc->sc_parent_tag);
782 ece_alloc_desc_dma_tx(sc);
785 desctx = (eth_tx_desc_t *)(&sc->desc_tx[i]);
793 ece_alloc_desc_dma_rx(sc);
796 descrx = &(sc->desc_rx[i]);
798 sc->rx_desc[i].desc = descrx;
799 sc->rx_desc[i].buff = 0;
800 ece_new_rxbuf(sc, &(sc->rx_desc[i]));
805 sc->tx_prod = 0;
806 sc->tx_cons = 0;
807 sc->last_rx = 0;
808 sc->desc_curr_tx = 0;
816 struct ece_softc *sc;
821 sc = device_get_softc(dev);
822 ifp = sc->ifp;
824 initial_switch_config = read_4(sc, SWITCH_CONFIG);
825 initial_cpu_config = read_4(sc, CPU_PORT_CONFIG);
826 initial_port0_config = read_4(sc, MAC_PORT_0_CONFIG);
827 initial_port1_config = read_4(sc, MAC_PORT_1_CONFIG);
830 mac_port_config = read_4(sc, MAC_PORT_0_CONFIG);
832 write_4(sc, MAC_PORT_0_CONFIG, mac_port_config);
835 mac_port_config = read_4(sc, MAC_PORT_1_CONFIG);
837 write_4(sc, MAC_PORT_1_CONFIG, mac_port_config);
839 err = ece_allocate_dma(sc);
841 if_printf(sc->ifp, "failed allocating dma\n");
845 write_4(sc, TS_DESCRIPTOR_POINTER, sc->ring_paddr_tx);
846 write_4(sc, TS_DESCRIPTOR_BASE_ADDR, sc->ring_paddr_tx);
848 write_4(sc, FS_DESCRIPTOR_POINTER, sc->ring_paddr_rx);
849 write_4(sc, FS_DESCRIPTOR_BASE_ADDR, sc->ring_paddr_rx);
851 write_4(sc, FS_DMA_CONTROL, 1);
862 struct ece_softc *sc;
864 sc = device_get_softc(dev);
866 if (sc->intrhand)
867 bus_teardown_intr(dev, sc->irq_res_rec, sc->intrhand);
869 sc->intrhand = 0;
871 if (sc->intrhand_qf)
872 bus_teardown_intr(dev, sc->irq_res_qf, sc->intrhand_qf);
874 sc->intrhand_qf = 0;
876 bus_generic_detach(sc->dev);
877 if (sc->miibus)
878 device_delete_child(sc->dev, sc->miibus);
879 if (sc->mem_res)
881 rman_get_rid(sc->mem_res), sc->mem_res);
882 sc->mem_res = 0;
884 if (sc->irq_res_rec)
886 rman_get_rid(sc->irq_res_rec), sc->irq_res_rec);
888 if (sc->irq_res_qf)
890 rman_get_rid(sc->irq_res_qf), sc->irq_res_qf);
892 if (sc->irq_res_qf)
894 rman_get_rid(sc->irq_res_status), sc->irq_res_status);
896 sc->irq_res_rec = 0;
897 sc->irq_res_qf = 0;
898 sc->irq_res_status = 0;
899 ECE_TXLOCK_DESTROY(sc);
900 ECE_RXLOCK_DESTROY(sc);
902 ece_free_desc_dma_tx(sc);
903 ece_free_desc_dma_rx(sc);
914 struct ece_softc *sc = ifp->if_softc;
918 mii = device_get_softc(sc->miibus);
919 ECE_LOCK(sc);
921 ECE_UNLOCK(sc);
931 struct ece_softc *sc = ifp->if_softc;
934 mii = device_get_softc(sc->miibus);
935 ECE_LOCK(sc);
939 ECE_UNLOCK(sc);
945 struct ece_softc *sc = xsc;
949 mii = device_get_softc(sc->miibus);
956 callout_reset(&sc->tick_ch, hz, ece_tick, sc);
1032 remove_mac_entry(struct ece_softc *sc,
1037 write_arl_table_entry(sc, 0, 1, VLAN0_GROUP_ID,
1043 add_mac_entry(struct ece_softc *sc,
1047 write_arl_table_entry(sc, 0, 1, VLAN0_GROUP_ID,
1106 configure_lan_port(struct ece_softc *sc, int phy_type)
1114 sw_config = read_4(sc, SWITCH_CONFIG);
1124 write_4(sc, SWITCH_CONFIG, sw_config);
1126 sw_config = read_4(sc, SWITCH_CONFIG);
1128 mac_port_config = read_4(sc, MAC_PORT_0_CONFIG);
1131 if_printf(sc->ifp, "Link Down\n");
1133 write_4(sc, MAC_PORT_0_CONFIG, mac_port_config);
1138 set_pvid(struct ece_softc *sc, int port0, int port1, int cpu)
1141 val = read_4(sc, VLAN_PORT_PVID) & (~(0x7 << 0));
1142 write_4(sc, VLAN_PORT_PVID, val);
1143 val = read_4(sc, VLAN_PORT_PVID) | ((port0) & 0x07);
1144 write_4(sc, VLAN_PORT_PVID, val);
1145 val = read_4(sc, VLAN_PORT_PVID) & (~(0x7 << 4));
1146 write_4(sc, VLAN_PORT_PVID, val);
1147 val = read_4(sc, VLAN_PORT_PVID) | (((port1) & 0x07) << 4);
1148 write_4(sc, VLAN_PORT_PVID, val);
1150 val = read_4(sc, VLAN_PORT_PVID) & (~(0x7 << 8));
1151 write_4(sc, VLAN_PORT_PVID, val);
1152 val = read_4(sc, VLAN_PORT_PVID) | (((cpu) & 0x07) << 8);
1153 write_4(sc, VLAN_PORT_PVID, val);
1159 set_vlan_vid(struct ece_softc *sc, int vlan)
1191 val = read_4(sc, reg);
1192 write_4(sc, reg, val & (~(0xFFF << 0)));
1193 val = read_4(sc, reg);
1194 write_4(sc, reg, val|((vid & 0xFFF) << 0));
1196 val = read_4(sc, reg);
1197 write_4(sc, reg, val & (~(0xFFF << 12)));
1198 val = read_4(sc, reg);
1199 write_4(sc, reg, val|((vid & 0xFFF) << 12));
1204 set_vlan_member(struct ece_softc *sc, int vlan)
1223 val = read_4(sc, VLAN_MEMBER_PORT_MAP) & (~(0x7 << shift));
1224 write_4(sc, VLAN_MEMBER_PORT_MAP, val);
1225 val = read_4(sc, VLAN_MEMBER_PORT_MAP);
1226 write_4(sc, VLAN_MEMBER_PORT_MAP, val | ((group & 0x7) << shift));
1230 set_vlan_tag(struct ece_softc *sc, int vlan)
1238 val = read_4(sc, VLAN_TAG_PORT_MAP) & (~(0x7 << shift));
1239 write_4(sc, VLAN_TAG_PORT_MAP, val);
1240 val = read_4(sc, VLAN_TAG_PORT_MAP);
1241 write_4(sc, VLAN_TAG_PORT_MAP, val | ((tag & 0x7) << shift));
1245 configure_cpu_port(struct ece_softc *sc)
1250 cpu_port_config = read_4(sc, CPU_PORT_CONFIG);
1256 write_4(sc, CPU_PORT_CONFIG, cpu_port_config);
1258 if (!write_arl_table_entry(sc, 0, 1, VLAN0_GROUP_ID,
1263 set_pvid(sc, PORT0_PVID, PORT1_PVID, CPU_PORT_PVID);
1266 set_vlan_vid(sc, i);
1267 set_vlan_member(sc, i);
1268 set_vlan_tag(sc, i);
1272 write_4(sc, INTERRUPT_MASK, 0xffff1fff);
1275 write_4(sc, INTERRUPT_STATUS, 0x00001FFF);
1277 write_4(sc, TS_DMA_CONTROL, 0);
1278 write_4(sc, FS_DMA_CONTROL, 0);
1283 hardware_init(struct ece_softc *sc)
1288 gw_phy_type = get_phy_type(sc);
1291 device_printf(sc->dev, "PHY type is not supported (%d)\n",
1295 status = configure_lan_port(sc, gw_phy_type);
1296 configure_cpu_port(sc);
1301 set_mac_address(struct ece_softc *sc, const char *mac, int mac_len)
1305 write_arl_table_entry(sc, 0, 1, VLAN0_GROUP_ID,
1310 write_arl_table_entry(sc, 0, 1, VLAN0_GROUP_ID,
1316 ece_set_mac(struct ece_softc *sc, u_char *eaddr)
1319 set_mac_address(sc, eaddr, ETHER_ADDR_LEN);
1328 ece_get_mac(struct ece_softc *sc, u_char *eaddr)
1334 ece_intr_rx_locked(struct ece_softc *sc, int count)
1336 struct ifnet *ifp = sc->ifp;
1348 fssd_curr = read_4(sc, FS_DESCRIPTOR_POINTER);
1350 fssd = (fssd_curr - (uint32_t)sc->ring_paddr_rx)>>4;
1352 desc = sc->rx_desc[sc->last_rx].desc;
1355 bus_dmamap_sync(sc->dmatag_ring_rx,
1356 sc->dmamap_ring_rx,
1359 if (fssd > sc->last_rx)
1360 rxcount = fssd - sc->last_rx;
1361 else if (fssd < sc->last_rx)
1362 rxcount = (ECE_MAX_RX_BUFFERS - sc->last_rx) + fssd;
1375 idx = sc->last_rx;
1376 rxdesc = &sc->rx_desc[idx];
1391 if (ece_new_rxbuf(sc, rxdesc) != 0) {
1415 ECE_RXUNLOCK(sc);
1417 ECE_RXLOCK(sc);
1422 bus_dmamap_sync(sc->dmatag_ring_rx,
1423 sc->dmamap_ring_rx,
1426 if (sc->last_rx == ECE_MAX_RX_BUFFERS - 1)
1427 sc->last_rx = 0;
1429 sc->last_rx++;
1431 desc = sc->rx_desc[sc->last_rx].desc;
1435 bus_dmamap_sync(sc->dmatag_ring_rx,
1436 sc->dmamap_ring_rx,
1445 struct ece_softc *sc = arg;
1446 ECE_RXLOCK(sc);
1447 ece_intr_rx_locked(sc, -1);
1448 ECE_RXUNLOCK(sc);
1454 struct ece_softc *sc = xsc;
1455 struct ifnet *ifp = sc->ifp;
1458 write_4(sc, FS_DMA_CONTROL, 0);
1462 taskqueue_enqueue(sc->sc_tq, &sc->sc_intr_task);
1465 taskqueue_enqueue(sc->sc_tq, &sc->sc_tx_task);
1471 struct ece_softc *sc = xsc;
1472 struct ifnet *ifp = sc->ifp;
1475 stat = read_4(sc, INTERRUPT_STATUS);
1477 write_4(sc, INTERRUPT_STATUS, stat);
1486 ece_cleanup_locked(struct ece_softc *sc)
1490 if (sc->tx_cons == sc->tx_prod) return;
1493 bus_dmamap_sync(sc->dmatag_ring_tx,
1494 sc->dmamap_ring_tx,
1497 while (sc->tx_cons != sc->tx_prod) {
1498 desc = sc->tx_desc[sc->tx_cons].desc;
1500 struct tx_desc_info *td = &(sc->tx_desc[sc->tx_cons]);
1502 bus_dmamap_sync(sc->dmatag_data_tx, td->dmamap,
1505 bus_dmamap_unload(sc->dmatag_data_tx, td->dmamap);
1508 sc->tx_cons = (sc->tx_cons + 1) % ECE_MAX_TX_BUFFERS;
1519 struct ece_softc *sc = arg;
1520 ECE_CLEANUPLOCK(sc);
1521 ece_cleanup_locked(sc);
1522 ECE_CLEANUPUNLOCK(sc);
1528 struct ece_softc *sc = xsc;
1529 struct ifnet *ifp = sc->ifp;
1532 write_4(sc, FS_DMA_CONTROL, 0);
1535 taskqueue_enqueue(sc->sc_tq, &sc->sc_cleanup_task);
1541 struct ece_softc *sc = xsc;
1542 struct ifnet *ifp = sc->ifp;
1545 write_4(sc, FS_DMA_CONTROL, 0);
1548 taskqueue_enqueue(sc->sc_tq, &sc->sc_intr_task);
1549 write_4(sc, FS_DMA_CONTROL, 1);
1558 struct ece_softc *sc = xsc;
1559 struct ifnet *ifp = sc->ifp;
1566 cfg_reg = read_4(sc, BIST_RESULT_TEST_0);
1572 write_4(sc, SWITCH_CONFIG, 0x007AA7A1);
1573 write_4(sc, MAC_PORT_0_CONFIG, 0x00423D00);
1574 write_4(sc, MAC_PORT_1_CONFIG, 0x00423D80);
1575 write_4(sc, CPU_PORT_CONFIG, 0x004C0000);
1577 hardware_init(sc);
1579 mac_port_config = read_4(sc, MAC_PORT_0_CONFIG);
1583 write_4(sc, MAC_PORT_0_CONFIG, mac_port_config);
1585 cpu_port_config = read_4(sc, CPU_PORT_CONFIG);
1588 write_4(sc, CPU_PORT_CONFIG, cpu_port_config);
1597 mii = device_get_softc(sc->miibus);
1600 write_4(sc, FS_DMA_CONTROL, 1);
1602 callout_reset(&sc->tick_ch, hz, ece_tick, sc);
1606 ece_encap(struct ece_softc *sc, struct mbuf *m0)
1618 ifp = sc->ifp;
1621 mapp = sc->tx_desc[sc->tx_prod].dmamap;
1623 error = bus_dmamap_load_mbuf_sg(sc->dmatag_ring_tx, mapp,
1628 bus_dmamap_unload(sc->dmatag_ring_tx, mapp);
1632 desc = &(sc->desc_tx[sc->desc_curr_tx]);
1633 sc->tx_desc[sc->tx_prod].desc = desc;
1634 sc->tx_desc[sc->tx_prod].buff = m0;
1635 desc_no = sc->desc_curr_tx;
1676 sc->desc_curr_tx = (sc->desc_curr_tx + 1) % ECE_MAX_TX_BUFFERS;
1677 if (sc->desc_curr_tx == 0) {
1678 desc = (eth_tx_desc_t *)&(sc->desc_tx[0]);
1682 desc = sc->tx_desc[sc->tx_prod].desc;
1684 sc->tx_prod = (sc->tx_prod + 1) % ECE_MAX_TX_BUFFERS;
1695 desc = (eth_tx_desc_t *)&(sc->desc_tx[0]);
1698 bus_dmamap_sync(sc->dmatag_data_tx, mapp, BUS_DMASYNC_PREWRITE);
1708 struct ece_softc *sc;
1712 sc = ifp->if_softc;
1717 bus_dmamap_sync(sc->dmatag_ring_tx,
1718 sc->dmamap_ring_tx,
1726 if (ece_encap(sc, m0)) {
1735 bus_dmamap_sync(sc->dmatag_ring_tx, sc->dmamap_ring_tx,
1737 write_4(sc, TS_DMA_CONTROL, 1);
1744 struct ece_softc *sc = xsc;
1745 ECE_LOCK(sc);
1746 eceinit_locked(sc);
1747 ECE_UNLOCK(sc);
1761 struct ece_softc *sc = ifp->if_softc;
1762 ECE_TXLOCK(sc);
1764 ECE_TXUNLOCK(sc);
1768 * Turn off interrupts, and stop the nic. Can be called with sc->ifp
1772 ecestop(struct ece_softc *sc)
1774 struct ifnet *ifp = sc->ifp;
1777 write_4(sc, TS_DMA_CONTROL, 0);
1778 write_4(sc, FS_DMA_CONTROL, 0);
1783 callout_stop(&sc->tick_ch);
1786 mac_port_config = read_4(sc, MAC_PORT_0_CONFIG);
1788 write_4(sc, MAC_PORT_0_CONFIG, mac_port_config);
1791 mac_port_config = read_4(sc, MAC_PORT_1_CONFIG);
1793 write_4(sc, MAC_PORT_1_CONFIG, mac_port_config);
1796 write_4(sc, INTERRUPT_MASK, 0x00001FFF);
1799 write_4(sc, INTERRUPT_STATUS, 0x00001FFF);
1801 write_4(sc, SWITCH_CONFIG, initial_switch_config);
1802 write_4(sc, CPU_PORT_CONFIG, initial_cpu_config);
1803 write_4(sc, MAC_PORT_0_CONFIG, initial_port0_config);
1804 write_4(sc, MAC_PORT_1_CONFIG, initial_port1_config);
1806 clear_mac_entries(sc, 1);
1810 ece_restart(struct ece_softc *sc)
1812 struct ifnet *ifp = sc->ifp;
1817 write_4(sc, PORT_0_CONFIG,
1818 read_4(sc, PORT_0_CONFIG) & ~(PORT_DISABLE));
1819 write_4(sc, INTERRUPT_MASK, 0x00000000);
1820 write_4(sc, FS_DMA_CONTROL, 1);
1821 callout_reset(&sc->tick_ch, hz, ece_tick, sc);
1825 set_filter(struct ece_softc *sc)
1831 ifp = sc->ifp;
1833 clear_mac_entries(sc, 0);
1835 mac_port_config = read_4(sc, MAC_PORT_0_CONFIG);
1838 write_4(sc, MAC_PORT_0_CONFIG, mac_port_config);
1845 add_mac_entry(sc,
1854 struct ece_softc *sc = ifp->if_softc;
1861 ECE_LOCK(sc);
1865 ecestop(sc);
1870 ece_restart(sc);
1872 ECE_UNLOCK(sc);
1877 ECE_LOCK(sc);
1878 set_filter(sc);
1879 ECE_UNLOCK(sc);
1884 mii = device_get_softc(sc->miibus);
1890 ECE_LOCK(sc);
1891 ECE_UNLOCK(sc);
1903 struct ece_softc *sc;
1905 sc = device_get_softc(dev);
1906 if (child == sc->miibus)
1907 sc->miibus = NULL;
1916 struct ece_softc *sc;
1917 sc = device_get_softc(dev);
1918 return (phy_read(sc, phy, reg));
1924 struct ece_softc *sc;
1925 sc = device_get_softc(dev);
1926 phy_write(sc, phy, reg, data);