broadcom/bcm2835/bcm2836.c

183 #define	BCM_LINTC_LOCK(sc)		mtx_lock_spin(&(sc)->bls_mtx)
184 #define	BCM_LINTC_UNLOCK(sc)		mtx_unlock_spin(&(sc)->bls_mtx)
185 #define	BCM_LINTC_LOCK_INIT(sc)		mtx_init(&(sc)->bls_mtx,	\
186     device_get_nameunit((sc)->bls_dev), "bmc_local_intc", MTX_SPIN)
187 #define	BCM_LINTC_LOCK_DESTROY(sc)	mtx_destroy(&(sc)->bls_mtx)
189 #define	bcm_lintc_read_4(sc, reg)		\
190     bus_space_read_4((sc)->bls_bst, (sc)->bls_bsh, (reg))
191 #define	bcm_lintc_write_4(sc, reg, val)		\
192     bus_space_write_4((sc)->bls_bst, (sc)->bls_bsh, (reg), (val))
195 bcm_lintc_rwreg_clr(struct bcm_lintc_softc *sc, uint32_t reg,
199 	bcm_lintc_write_4(sc, reg, bcm_lintc_read_4(sc, reg) & ~mask);
203 bcm_lintc_rwreg_set(struct bcm_lintc_softc *sc, uint32_t reg,
207 	bcm_lintc_write_4(sc, reg, bcm_lintc_read_4(sc, reg) | mask);
211 bcm_lintc_timer_mask(struct bcm_lintc_softc *sc, struct bcm_lintc_irqsrc *bli)
218 	BCM_LINTC_LOCK(sc);
221 			bcm_lintc_rwreg_clr(sc, BCM_LINTC_TIMER_CFG_REG(cpu),
223 	BCM_LINTC_UNLOCK(sc);
227 bcm_lintc_timer_unmask(struct bcm_lintc_softc *sc, struct bcm_lintc_irqsrc *bli)
234 	BCM_LINTC_LOCK(sc);
237 			bcm_lintc_rwreg_set(sc, BCM_LINTC_TIMER_CFG_REG(cpu),
239 	BCM_LINTC_UNLOCK(sc);
243 bcm_lintc_gpu_mask(struct bcm_lintc_softc *sc, struct bcm_lintc_irqsrc *bli)
247 	bcm_lintc_write_4(sc, BCM_LINTC_GPU_ROUTING_REG, 0);
251 bcm_lintc_gpu_unmask(struct bcm_lintc_softc *sc, struct bcm_lintc_irqsrc *bli)
255 	bcm_lintc_write_4(sc, BCM_LINTC_GPU_ROUTING_REG, bli->bli_value);
259 bcm_lintc_pmu_mask(struct bcm_lintc_softc *sc, struct bcm_lintc_irqsrc *bli)
267 	BCM_LINTC_LOCK(sc);
272 	bcm_lintc_write_4(sc, BCM_LINTC_PMU_ROUTING_CLR_REG, mask);
273 	BCM_LINTC_UNLOCK(sc);
277 bcm_lintc_pmu_unmask(struct bcm_lintc_softc *sc, struct bcm_lintc_irqsrc *bli)
285 	BCM_LINTC_LOCK(sc);
290 	bcm_lintc_write_4(sc, BCM_LINTC_PMU_ROUTING_SET_REG, mask);
291 	BCM_LINTC_UNLOCK(sc);
295 bcm_lintc_mask(struct bcm_lintc_softc *sc, struct bcm_lintc_irqsrc *bli)
303 		bcm_lintc_timer_mask(sc, bli);
311 		bcm_lintc_gpu_mask(sc, bli);
314 		bcm_lintc_pmu_mask(sc, bli);
322 bcm_lintc_unmask(struct bcm_lintc_softc *sc, struct bcm_lintc_irqsrc *bli)
330 		bcm_lintc_timer_unmask(sc, bli);
338 		bcm_lintc_gpu_unmask(sc, bli);
341 		bcm_lintc_pmu_unmask(sc, bli);
350 bcm_lintc_ipi_write(struct bcm_lintc_softc *sc, cpuset_t cpus, u_int ipi)
358 			bcm_lintc_write_4(sc, BCM_LINTC_MBOX0_SET_REG(cpu),
363 bcm_lintc_ipi_dispatch(struct bcm_lintc_softc *sc, u_int cpu,
369 	mask = bcm_lintc_read_4(sc, BCM_LINTC_MBOX0_CLR_REG(cpu));
371 		device_printf(sc->bls_dev, "Spurious ipi detected\n");
382 		bcm_lintc_write_4(sc, BCM_LINTC_MBOX0_CLR_REG(cpu), 1 << ipi);
390 bcm_lintc_irq_dispatch(struct bcm_lintc_softc *sc, u_int irq,
395 	bli = &sc->bls_isrcs[irq];
397 		device_printf(sc->bls_dev, "Stray irq %u detected\n", irq);
403 	struct bcm_lintc_softc *sc;
408 	sc = arg;
413 		reg = bcm_lintc_read_4(sc, BCM_LINTC_PENDING_REG(cpu));
418 			bcm_lintc_ipi_dispatch(sc, cpu, tf);
421 			bcm_lintc_irq_dispatch(sc, BCM_LINTC_TIMER0_IRQ, tf);
423 			bcm_lintc_irq_dispatch(sc, BCM_LINTC_TIMER1_IRQ, tf);
425 			bcm_lintc_irq_dispatch(sc, BCM_LINTC_TIMER2_IRQ, tf);
427 			bcm_lintc_irq_dispatch(sc, BCM_LINTC_TIMER3_IRQ, tf);
429 			bcm_lintc_irq_dispatch(sc, BCM_LINTC_GPU_IRQ, tf);
431 			bcm_lintc_irq_dispatch(sc, BCM_LINTC_PMU_IRQ, tf);
437 		device_printf(sc->bls_dev, "Unknown interrupt(s) %x\n", reg);
439 		device_printf(sc->bls_dev, "Spurious interrupt detected\n");
465 	struct bcm_lintc_softc *sc;
474 	sc = device_get_softc(dev);
475 	*isrcp = &sc->bls_isrcs[daf->cells[0]].bli_isrc;
519 	struct bcm_lintc_softc *sc;
522 		sc = device_get_softc(dev);
523 		BCM_LINTC_LOCK(sc);
525 		BCM_LINTC_UNLOCK(sc);
532 bcm_lintc_init_rwreg_on_ap(struct bcm_lintc_softc *sc, u_int cpu, u_int irq,
536 	if (intr_isrc_init_on_cpu(&sc->bls_isrcs[irq].bli_isrc, cpu))
537 		bcm_lintc_rwreg_set(sc, reg, mask);
541 bcm_lintc_init_pmu_on_ap(struct bcm_lintc_softc *sc, u_int cpu)
543 	struct intr_irqsrc *isrc = &sc->bls_isrcs[BCM_LINTC_PMU_IRQ].bli_isrc;
547 		bcm_lintc_write_4(sc, BCM_LINTC_PMU_ROUTING_SET_REG,
556 	struct bcm_lintc_softc *sc;
559 	sc = device_get_softc(dev);
561 	BCM_LINTC_LOCK(sc);
562 	bcm_lintc_init_rwreg_on_ap(sc, cpu, BCM_LINTC_TIMER0_IRQ,
564 	bcm_lintc_init_rwreg_on_ap(sc, cpu, BCM_LINTC_TIMER1_IRQ,
566 	bcm_lintc_init_rwreg_on_ap(sc, cpu, BCM_LINTC_TIMER2_IRQ,
568 	bcm_lintc_init_rwreg_on_ap(sc, cpu, BCM_LINTC_TIMER3_IRQ,
570 	bcm_lintc_init_pmu_on_ap(sc, cpu);
571 	BCM_LINTC_UNLOCK(sc);
578 	struct bcm_lintc_softc *sc = device_get_softc(dev);
580 	KASSERT(isrc == &sc->bls_isrcs[BCM_LINTC_MBOX0_IRQ].bli_isrc,
582 	bcm_lintc_ipi_write(sc, cpus, ipi);
588 	struct bcm_lintc_softc *sc = device_get_softc(dev);
592 	*isrcp = &sc->bls_isrcs[BCM_LINTC_MBOX0_IRQ].bli_isrc;
598 bcm_lintc_pic_attach(struct bcm_lintc_softc *sc)
608 	bisrcs = sc->bls_isrcs;
609 	name = device_get_nameunit(sc->bls_dev);
650 		error = intr_isrc_register(&bisrcs[irq].bli_isrc, sc->bls_dev,
656 	xref = OF_xref_from_node(ofw_bus_get_node(sc->bls_dev));
657 	pic = intr_pic_register(sc->bls_dev, xref);
661 	return (intr_pic_claim_root(sc->bls_dev, xref, bcm_lintc_intr, sc, 0));
680 	struct bcm_lintc_softc *sc;
683 	sc = device_get_softc(dev);
685 	sc->bls_dev = dev;
690 	sc->bls_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
692 	if (sc->bls_mem == NULL) {
697 	sc->bls_bst = rman_get_bustag(sc->bls_mem);
698 	sc->bls_bsh = rman_get_bushandle(sc->bls_mem);
700 	bcm_lintc_write_4(sc, BCM_LINTC_CONTROL_REG, 0);
701 	bcm_lintc_write_4(sc, BCM_LINTC_PRESCALER_REG, BCM_LINTC_PSR_19_2);
705 		bcm_lintc_write_4(sc, BCM_LINTC_TIMER_CFG_REG(cpu), 0);
710 		bcm_lintc_write_4(sc, BCM_LINTC_MBOX_CFG_REG(cpu),
714 	if (bcm_lintc_pic_attach(sc) != 0) {
719 	BCM_LINTC_LOCK_INIT(sc);
720 	bcm_lintc_sc = sc;