Lines Matching refs:val
80 #define MODCLK_READ(sc, val) CLKDEV_READ_4((sc)->clkdev, (sc)->reg, (val))
81 #define MODCLK_WRITE(sc, val) CLKDEV_WRITE_4((sc)->clkdev, (sc)->reg, (val))
89 uint32_t val, index;
94 MODCLK_READ(sc, &val);
97 index = (val & CLK_SRC_SEL) >> CLK_SRC_SEL_SHIFT;
107 uint32_t val;
115 MODCLK_READ(sc, &val);
116 val &= ~CLK_SRC_SEL;
117 val |= (index << CLK_SRC_SEL_SHIFT);
118 MODCLK_WRITE(sc, val);
128 uint32_t val;
133 MODCLK_READ(sc, &val);
135 val |= SCLK_GATING;
137 val &= ~SCLK_GATING;
138 MODCLK_WRITE(sc, val);
148 uint32_t val, m, n;
153 MODCLK_READ(sc, &val);
156 n = 1 << ((val & CLK_RATIO_N) >> CLK_RATIO_N_SHIFT);
157 m = ((val & CLK_RATIO_M) >> CLK_RATIO_M_SHIFT) + 1;
169 uint32_t val, m, n, phase, ophase;
211 MODCLK_READ(sc, &val);
212 val &= ~(CLK_RATIO_N | CLK_RATIO_M | CLK_PHASE_CTR |
214 val |= (n << CLK_RATIO_N_SHIFT);
215 val |= (m << CLK_RATIO_M_SHIFT);
216 val |= (phase << CLK_PHASE_CTR_SHIFT);
217 val |= (ophase << OUTPUT_CLK_PHASE_CTR_SHIFT);
218 MODCLK_WRITE(sc, val);