lib/libpmc/libpmc.c

533 pmc_parse_mask(const struct pmc_masks *pmask, char *p, uint64_t *evmask)
551 		*evmask |= pm->pm_value;
960 	uint64_t cachestate, evmask, rsp;
967 	cachestate = evmask = rsp = 0;
994 			n = pmc_parse_mask(iap_core_mask, p, &evmask);
998 			n = pmc_parse_mask(iap_agent_mask, p, &evmask);
1002 			n = pmc_parse_mask(iap_prefetch_mask, p, &evmask);
1009 			n = pmc_parse_mask(iap_transition_mask, p, &evmask);
1018 				    &evmask);
1021 				    &evmask);
1068 	pmc_config->pm_md.pm_iap.pm_iap_config |= evmask;
1613 	uint64_t	evmask = 0;
1861 			if ((n = pmc_parse_mask(pmask, p, &evmask)) < 0)
1873 		    AMD_PMC_TO_UNITMASK(evmask);
2088 	uint64_t	evmask;
2095 	evmask = 0;
2186 			if ((n = pmc_parse_mask(pmask, p, &evmask)) < 0)
2211 		/* XXX CPU Rev A,B evmask is to be zero */
2212 		if (evmask & (evmask - 1)) /* > 1 bit set */
2214 		if (evmask == 0) {
2215 			evmask = 0x01; /* Rev C and later: #instrs */
2220 		if (evmask == 0 && pmask != NULL) {
2222 				evmask |= pm->pm_value;
2229 		    AMD_PMC_TO_UNITMASK(evmask);
2571 	uint64_t evmask;
2579 	evmask  = 0;
2749 			evmask = (evmask & ~0x1F) | (count & 0x1F);
2757 			if ((n = pmc_parse_mask(pmask, p, &evmask)) < 0)
2809 	if (evmask)
2814 		if ((evmask & 0x06) == 0x06 ||
2815 		    (evmask & 0x18) == 0x18)
2817 		if (evmask == 0) /* default:drdy-{drv,own}+dbsy{drv,own} */
2818 			evmask = 0x1D;
2822 		if ((evmask & (evmask - 1)) != 0)
2824 		if (evmask == 0) {
2825 			evmask = 0x1;	/* 'CLEAR' */
2830 		if (evmask == 0 && pmask) {
2832 				evmask |= pm->pm_value;
2838 	    P4_ESCR_TO_EVENT_MASK(evmask);
2999 	uint64_t evmask;
3006 	evmask = 0;
3085 			evmask = 0;
3086 			if ((n = pmc_parse_mask(pmask, p, &evmask)) < 0)
3124 		 * The following events default to an evmask of 0
3166 		evmask = 0x0F;		/* only value allowed */
3174 		if (evmask == 0 && pmask) {
3176 				evmask |= pm->pm_value;
3185 		    P6_EVSEL_TO_UMASK(evmask);