Lines Matching refs:mnReg
18064 int mnReg, mxReg; /* Range of registers allocated for aCol and aFunc */
136784 ** AggInfo.mnReg..AggInfo.mxReg */
136785 assert( nReg==pAggInfo->mxReg-pAggInfo->mnReg+1 );
136787 assert( pAggInfo->aCol[i].iMem>=pAggInfo->mnReg
136791 assert( pAggInfo->aFunc[i].iMem>=pAggInfo->mnReg
136795 sqlite3VdbeAddOp3(v, OP_Null, 0, pAggInfo->mnReg, pAggInfo->mxReg);
137851 pAggInfo->mnReg = pParse->nMem+1;