Lines Matching defs:TI
574 void getFeasibleSuccessors(Instruction &TI, SmallVectorImpl<bool> &Succs);
615 void visitTerminator(Instruction &TI);
667 void SCCPSolver::getFeasibleSuccessors(Instruction &TI,
669 Succs.resize(TI.getNumSuccessors());
670 if (auto *BI = dyn_cast<BranchInst>(&TI)) {
692 if (TI.isExceptionalTerminator()) {
693 Succs.assign(TI.getNumSuccessors(), true);
697 if (auto *SI = dyn_cast<SwitchInst>(&TI)) {
708 Succs.assign(TI.getNumSuccessors(), true);
718 if (auto *IBR = dyn_cast<IndirectBrInst>(&TI)) {
725 Succs.assign(TI.getNumSuccessors(), true);
747 if (isa<CallBrInst>(&TI)) {
748 Succs.assign(TI.getNumSuccessors(), true);
752 LLVM_DEBUG(dbgs() << "Unknown terminator instruction: " << TI << '\n');
861 void SCCPSolver::visitTerminator(Instruction &TI) {
863 getFeasibleSuccessors(TI, SuccFeasible);
865 BasicBlock *BB = TI.getParent();
870 markEdgeExecutable(BB, TI.getSuccessor(i));
1672 Instruction *TI = BB.getTerminator();
1673 if (auto *BI = dyn_cast<BranchInst>(TI)) {
1682 markEdgeExecutable(&BB, TI->getSuccessor(1));
1690 BasicBlock *DefaultSuccessor = TI->getSuccessor(1);
1697 if (auto *IBR = dyn_cast<IndirectBrInst>(TI)) {
1726 if (auto *SI = dyn_cast<SwitchInst>(TI)) {