Target/X86/X86InstrInfo.cpp

60 ReMatPICStubLoad("remat-pic-stub-load",
61                  cl::desc("Re-materialize load from stub in PIC mode"),
608       // Allow re-materialization of PIC load.
695   // Left shift instructions can be transformed into load-effective-address
3061                                       bool load) {
3075         return load ? X86::MOV8rm_NOREX : X86::MOV8mr_NOREX;
3076     return load ? X86::MOV8rm : X86::MOV8mr;
3079       return load ? X86::KMOVWkm : X86::KMOVWmk;
3081     return load ? X86::MOV16rm : X86::MOV16mr;
3084       return load ? X86::MOV32rm : X86::MOV32mr;
3086       return load ?
3094       return load ? X86::LD_Fp32m : X86::ST_Fp32m;
3097       return load ? X86::KMOVDkm : X86::KMOVDmk;
3106       return load ? X86::MASKPAIR16LOAD : X86::MASKPAIR16STORE;
3110       return load ? X86::MOV64rm : X86::MOV64mr;
3112       return load ?
3120       return load ? X86::MMX_MOVQ64rm : X86::MMX_MOVQ64mr;
3122       return load ? X86::LD_Fp64m : X86::ST_Fp64m;
3125       return load ? X86::KMOVQkm : X86::KMOVQmk;
3130     return load ? X86::LD_Fp80m : X86::ST_FpP80m;
3135         return load ?
3145         return load ?
3157         return load ? X86::BNDMOV64rm : X86::BNDMOV64mr;
3159         return load ? X86::BNDMOV32rm : X86::BNDMOV32mr;
3167       return load ?
3175       return load ?
3186       return load ? X86::VMOVAPSZrm : X86::VMOVAPSZmr;
3188       return load ? X86::VMOVUPSZrm : X86::VMOVUPSZmr;
3827 /// Try to remove the load by folding it to a register
3828 /// operand at the use. We fold the load instructions if load defines a virtual
3830 /// instructions in-between do not load or store, and have no side effects.
4025     // We can use a normal VEX encoded load.
4260 /// not needed. e.g. cvtss2sd, sqrtss. Unfolding the load from these
4737     // Attempt to convert the load of inserted vector into a fold load
4766     // To fold the load, adjust the pointer to the upper and use (V)MOVLPS.
4785     // MOVHPD instead. Done as custom because we can't have this in the load
4907         // Check if it's safe to fold the load. If the size of the object is
4908         // narrower than the load width, then it's not.
4911         // If this is a 64-bit load, but the spill slot is 32, then we can do
4912         // a 32-bit load which is implicitly zero-extended. This likely is
4913         // due to live interval analysis remat'ing a load from stack slot.
4927       // If this is the special case where we use a MOV32rm to load a 32-bit
5043     // Check if it's safe to fold the load. If the size of the object is
5044     // narrower than the load width, then it's not.
5058 /// Check if \p LoadMI is a partial register load that we can't fold into \p MI
5086     // These instructions only load 32 bits, we can't fold them if the
5140     // These instructions only load 64 bits, we can't fold them if the
5223   // Determine the alignment of the load.
5274   // Otherwise we risk changing the size of the load.
5296     // Folding a V_SET0 or V_SETALLONES as a load, to ease register pressure.
5297     // Create a constant-pool entry and operands to load from it.
5344     // Create operands to load from the constant pool entry.
5356     // Folding a normal load. Just copy the load's address operands.
5399       // Clone the MMO and unset the load flag.
5498   // Emit the load or broadcast instruction.
5634   // Emit the load instruction.
5641       // Do not introduce a slow unaligned load.
5775   // AVX load instructions
5792   // AVX512 load instructions
5858   // AVX load instructions
5875   // AVX512 load instructions