Lines Matching refs:Regs
64 assert(OrigArg.Regs.size() == 1 && "Can't handle multple regs yet");
74 SplitArgs.emplace_back(OrigArg.Regs[0], VT.getTypeForEVT(Context),
89 SplitRegs.push_back(Info.Regs[0]);
212 [&](ArrayRef<Register> Regs) {
213 MIRBuilder.buildUnmerge(Regs, VRegs[i]);
357 [&](ArrayRef<Register> Regs) {
358 MIRBuilder.buildMerge(VRegs[Idx][0], Regs);
414 if (OrigArg.Regs.size() > 1)
418 [&](ArrayRef<Register> Regs) {
419 MIRBuilder.buildUnmerge(Regs, OrigArg.Regs[0]);
461 if (Info.OrigRet.Regs.size() > 1)
468 [&](ArrayRef<Register> Regs) {
469 NewRegs.assign(Regs.begin(), Regs.end());
478 MIRBuilder.buildMerge(Info.OrigRet.Regs[0], NewRegs);