Lines Matching refs:REX

70   /// REX prefix.
750 // VEX_R: opcode externsion equivalent to REX.R in
759 // VEX_X: equivalent to REX.X, only used when a
762 // 1: Same as REX.X=0 (must be 1 in 32-bit mode)
763 // 0: Same as REX.X=1 (64-bit mode only)
773 // VEX_W: opcode specific (use like REX.W, or used for
1166 /// Determine if the MCInst has to be encoded with a X86-64 REX prefix which
1172 uint8_t REX = 0;
1176 REX |= 1 << 3; // set REX.W
1179 return REX;
1184 // If it accesses SPL, BPL, SIL, or DIL, then it requires a 0x40 REX prefix.
1195 REX |= 0x40; // REX fixed encoding prefix
1200 REX |= isREXExtendedReg(MI, CurOp++) << 0; // REX.B
1204 REX |= isREXExtendedReg(MI, CurOp++) << 2; // REX.R
1205 REX |= isREXExtendedReg(MI, CurOp++) << 0; // REX.B
1209 REX |= isREXExtendedReg(MI, CurOp++) << 2; // REX.R
1210 REX |= isREXExtendedReg(MI, MemOperand + X86::AddrBaseReg) << 0; // REX.B
1211 REX |= isREXExtendedReg(MI, MemOperand + X86::AddrIndexReg) << 1; // REX.X
1215 REX |= isREXExtendedReg(MI, CurOp++) << 0; // REX.B
1216 REX |= isREXExtendedReg(MI, CurOp++) << 2; // REX.R
1219 REX |= isREXExtendedReg(MI, MemOperand + X86::AddrBaseReg) << 0; // REX.B
1220 REX |= isREXExtendedReg(MI, MemOperand + X86::AddrIndexReg) << 1; // REX.X
1222 REX |= isREXExtendedReg(MI, CurOp++) << 2; // REX.R
1234 REX |= isREXExtendedReg(MI, MemOperand + X86::AddrBaseReg) << 0; // REX.B
1235 REX |= isREXExtendedReg(MI, MemOperand + X86::AddrIndexReg) << 1; // REX.X
1247 REX |= isREXExtendedReg(MI, CurOp++) << 0; // REX.B
1250 if (REX && UsesHighByteReg)
1252 "Cannot encode high byte register in REX-prefixed instruction");
1254 return REX;
1294 /// \returns true if a REX prefix was used.
1326 // Handle REX prefix.
1329 if (uint8_t REX = determineREXPrefix(MI, TSFlags, MemOperand, Desc)) {
1330 emitByte(0x40 | REX, CurByte, OS);
1334 assert(!(TSFlags & X86II::REX_W) && "REX.W requires 64bit mode.");