Target/PowerPC/PPCISelLowering.cpp

594       // For v2i64, these are only valid with P8Vector. This is corrected after
699       setOperationAction(ISD::SMAX, MVT::v2i64, Expand);
700       setOperationAction(ISD::SMIN, MVT::v2i64, Expand);
701       setOperationAction(ISD::UMAX, MVT::v2i64, Expand);
702       setOperationAction(ISD::UMIN, MVT::v2i64, Expand);
705     for (auto VT : {MVT::v2i64, MVT::v4i32, MVT::v8i16, MVT::v16i8})
736     // Without hasP8Altivec set, v2i64 SMAX isn't available.
739       setOperationAction(ISD::ABS, MVT::v2i64, Expand);
747       setOperationAction(ISD::ROTL, MVT::v2i64, Legal);
795         setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v2i64, Legal);
799         setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2i64, Legal);
848         setOperationAction(ISD::SHL, MVT::v2i64, Legal);
849         setOperationAction(ISD::SRA, MVT::v2i64, Legal);
850         setOperationAction(ISD::SRL, MVT::v2i64, Legal);
860         setOperationAction(ISD::SETCC, MVT::v2i64, Legal);
863         setOperationAction(ISD::SHL, MVT::v2i64, Expand);
864         setOperationAction(ISD::SRA, MVT::v2i64, Expand);
865         setOperationAction(ISD::SRL, MVT::v2i64, Expand);
867         setOperationAction(ISD::SETCC, MVT::v2i64, Custom);
869         // VSX v2i64 only supports non-arithmetic operations.
870         setOperationAction(ISD::ADD, MVT::v2i64, Expand);
871         setOperationAction(ISD::SUB, MVT::v2i64, Expand);
874       setOperationAction(ISD::LOAD, MVT::v2i64, Promote);
875       AddPromotedToType (ISD::LOAD, MVT::v2i64, MVT::v2f64);
876       setOperationAction(ISD::STORE, MVT::v2i64, Promote);
877       AddPromotedToType (ISD::STORE, MVT::v2i64, MVT::v2f64);
879       setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2i64, Legal);
881       setOperationAction(ISD::SINT_TO_FP, MVT::v2i64, Legal);
882       setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Legal);
883       setOperationAction(ISD::FP_TO_SINT, MVT::v2i64, Legal);
884       setOperationAction(ISD::FP_TO_UINT, MVT::v2i64, Legal);
906         setOperationAction(ISD::BUILD_VECTOR, MVT::v2i64, Custom);
909       addRegisterClass(MVT::v2i64, &PPC::VSRCRegClass);
913       addRegisterClass(MVT::v2i64, &PPC::VRRCRegClass);
969       setOperationAction(ISD::BSWAP, MVT::v2i64, Legal);
983       setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i64, Legal);
3041   if (Op.getValueType() == MVT::v2i64) {
3042     // When the operands themselves are v2i64 values, we need to do something
3044     if (Op.getOperand(0).getValueType() == MVT::v2i64) {
3048         return DAG.getNode(ISD::BITCAST, dl, MVT::v2i64,
3369       ArgVT == MVT::v2f64 || ArgVT == MVT::v2i64 ||
3449         ArgVT == MVT::v2f64 || ArgVT == MVT::v2i64 ||
3587         case MVT::v2i64:
4061     case MVT::v2i64:
5949         case MVT::v2i64:
6330     case MVT::v2i64:
6541         ArgVT == MVT::v2f64 || ArgVT == MVT::v2i64) {
8028   MVT IntermediateVT = FourEltRes ? MVT::v4i32 : MVT::v2i64;
8553     (HasDirectMove && (VecVT == MVT::v2i64 || VecVT == MVT::v4i32));
9263         DAG.getVTList(IsFourByte ? MVT::v4i32 : MVT::v2i64, MVT::Other);
9317     SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, V1);
9319         DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, V2.isUndef() ? V1 : V2);
9321     SDValue PermDI = DAG.getNode(PPCISD::XXPERMDI, dl, MVT::v2i64, Conv1, Conv2,
9336       SDValue Conv = DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, V1);
9337       SDValue ReveDWord = DAG.getNode(ISD::BSWAP, dl, MVT::v2i64, Conv);
9899   Op = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v2i64, Op.getOperand(0),
9902   Op = DAG.getNode(ISD::BSWAP, dl, MVT::v2i64, Op);
10345   assert((VT == MVT::v2i64 || VT == MVT::v4i32 || VT == MVT::v8i16 ||
10348   assert((VT != MVT::v2i64 || Subtarget.hasP8Altivec()) &&
10349          "Current subtarget doesn't support smax v2i64!");
10366   if (VT == MVT::v2i64)
13043     EVT NewVT = TargetVT == MVT::v2i64 ? MVT::v2f64 : MVT::v4f32;
13841           (StoreVT == MVT::v2f64 || StoreVT == MVT::v2i64 ||
13856           (LoadVT == MVT::v2f64 || LoadVT == MVT::v2i64 ||
15290       if (VT != MVT::v2f64 && VT != MVT::v2i64 &&
15353   if (VT == MVT::v2i64)
15676     SDValue Bitcast = DCI.DAG.getBitcast(MVT::v2i64, Op0.getOperand(0));