Lines Matching refs:Base

2319 bool PPCTargetLowering::SelectAddressEVXRegReg(SDValue N, SDValue &Base,
2326 Base = N.getOperand(0);
2341 bool PPCTargetLowering::SelectAddressRegReg(SDValue N, SDValue &Base,
2348 if (hasSPE() && SelectAddressEVXRegReg(N, Base, Index, DAG))
2356 Base = N.getOperand(0);
2374 Base = N.getOperand(0);
2429 SDValue &Base,
2435 if (SelectAddressRegReg(N, Disp, Base, DAG, EncodingAlignment))
2444 Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType());
2447 Base = N.getOperand(0);
2459 Base = N.getOperand(0);
2476 Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType());
2479 Base = N.getOperand(0);
2494 Base = DAG.getRegister(Subtarget.isPPC64() ? PPC::ZERO8 : PPC::ZERO,
2508 Base = DAG.getTargetConstant((Addr - (signed short)Addr) >> 16, dl,
2511 Base = SDValue(DAG.getMachineNode(Opc, dl, CN->getValueType(0), Base), 0);
2518 Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType());
2521 Base = N;
2527 bool PPCTargetLowering::SelectAddressRegRegOnly(SDValue N, SDValue &Base,
2533 if (SelectAddressRegReg(N, Base, Index, DAG))
2545 Base = N.getOperand(0);
2551 Base = DAG.getRegister(Subtarget.isPPC64() ? PPC::ZERO8 : PPC::ZERO,
2603 bool PPCTargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base,
2637 } else if (SelectAddressRegRegOnly(Ptr, Offset, Base, DAG)) {
2643 if (SelectAddressRegReg(Ptr, Base, Offset, DAG)) {
2647 // those situations here, and try with swapped Base/Offset instead.
2650 if (isa<FrameIndexSDNode>(Base) || isa<RegisterSDNode>(Base))
2654 if (Val == Base || Base.getNode()->isPredecessorOf(Val.getNode()))
2659 std::swap(Base, Offset);
2667 if (!SelectAddressRegImm(Ptr, Offset, Base, DAG, 0))
2674 if (!SelectAddressRegImm(Ptr, Offset, Base, DAG, 4))
12053 static void getBaseWithConstantOffset(SDValue Loc, SDValue &Base,
12056 Base = Loc.getOperand(0);
12061 getBaseWithConstantOffset(Loc.getOperand(0), Base, Offset, DAG);
12065 static bool isConsecutiveLSLoc(SDValue Loc, EVT VT, LSBaseSDNode *Base,
12071 SDValue BaseLoc = Base->getBasePtr();
12105 static bool isConsecutiveLS(SDNode *N, LSBaseSDNode *Base,
12111 return isConsecutiveLSLoc(Loc, VT, Base, Bytes, Dist, DAG);
12157 return isConsecutiveLSLoc(N->getOperand(2), VT, Base, Bytes, Dist, DAG);
12207 return isConsecutiveLSLoc(N->getOperand(3), VT, Base, Bytes, Dist, DAG);
13470 SDValue Base;
13479 Base = LD->getBasePtr();
13493 Base = Intrin->getOperand(2);
13508 SDValue LoadOps[] = { Chain, Base };
13538 SDValue Base;
13548 Base = ST->getBasePtr();
13562 Base = Intrin->getOperand(3);
13589 SDValue StoreOps[] = { Chain, Swap, Base };