Lines Matching defs:R0
597 - If MBB is an entry or exit block, set SR1 and SR2 to R0 and R12
601 - If the defaults (R0/R12) are available, return true
619 unsigned R0 = Subtarget.isPPC64() ? PPC::X0 : PPC::R0;
624 *SR1 = R0;
631 // If MBB is an entry or exit block, use R0 and R12 as the scratch registers.
652 // Note that we only return here if both R0 and R12 are available because
655 if (!RS.isRegUsed(R0) && !RS.isRegUsed(R12))
1131 // which could be R0, and R0 cannot be used as a base address.
1139 if (ScratchReg == PPC::R0) {
1140 // R0 cannot be used as a base register, but it can be used as an
1144 // R0 += (FPOffset-LastOffset).
1145 // Need addic, since addi treats R0 as 0.
1150 // Store FP into *R0.
1154 .addReg(ScratchReg); // This will be the index (R0 is ok here).
1157 // R0 += (PBPOffset-LastOffset).
1165 .addReg(ScratchReg); // This will be the index (R0 is ok here).
1168 // R0 += (BPOffset-LastOffset).
1176 .addReg(ScratchReg); // This will be the index (R0 is ok here).
1177 // BP = R0-LastOffset
1183 // ScratchReg is not R0, so use it as the base register. It is
1577 // could happen to be R0. Use FP instead, but make sure to preserve it.
1616 // a base register anyway, because it may happen to be R0.
2318 unsigned TmpReg = is64Bit ? PPC::X0 : PPC::R0;