Lines Matching defs:RegisterSubReg

50   struct RegisterSubReg {
53 RegisterSubReg(unsigned r = 0, unsigned s = 0) : R(r), S(s) {}
54 RegisterSubReg(const MachineOperand &MO) : R(MO.getReg()), S(MO.getSubReg()) {}
55 RegisterSubReg(const Register &Reg) : R(Reg), S(0) {}
57 bool operator== (const RegisterSubReg &Reg) const {
61 bool operator< (const RegisterSubReg &Reg) const {
69 PrintRegister(RegisterSubReg R, const TargetRegisterInfo &I) : Reg(R), TRI(I) {}
72 RegisterSubReg Reg;
104 using SetOfReg = std::set<RegisterSubReg>;
105 using RegToRegMap = std::map<RegisterSubReg, RegisterSubReg>;
116 void processPredicateGPR(const RegisterSubReg &Reg);
120 bool isScalarPred(RegisterSubReg PredReg);
121 RegisterSubReg getPredRegFor(const RegisterSubReg &Reg);
216 RegisterSubReg RD = MI->getOperand(0);
226 void HexagonGenPredicate::processPredicateGPR(const RegisterSubReg &Reg) {
245 RegisterSubReg HexagonGenPredicate::getPredRegFor(const RegisterSubReg &Reg) {
260 RegisterSubReg PR = DefI->getOperand(1);
277 G2P.insert(std::make_pair(Reg, RegisterSubReg(NewPR)));
278 LLVM_DEBUG(dbgs() << " -> !" << PrintRegister(RegisterSubReg(NewPR), *TRI)
280 return RegisterSubReg(NewPR);
322 bool HexagonGenPredicate::isScalarPred(RegisterSubReg PredReg) {
323 std::queue<RegisterSubReg> WorkQ;
327 RegisterSubReg PR = WorkQ.front();
356 WorkQ.push(RegisterSubReg(MO.getReg()));
378 RegisterSubReg Reg(MO);
405 RegisterSubReg PR = getPredRegFor(MI->getOperand(1));
416 RegisterSubReg OutR(Op0);
422 RegisterSubReg NewPR = MRI->createVirtualRegister(PredRC);
427 RegisterSubReg GPR = MI->getOperand(i);
428 RegisterSubReg Pred = getPredRegFor(GPR);
446 RegisterSubReg R(NewOutR);
473 RegisterSubReg DR = MI.getOperand(0);
474 RegisterSubReg SR = MI.getOperand(1);