Lines Matching refs:SrcR
466 // ... = insert(SrcR, InsR, #Wdh, #Off)
469 : SrcR(SR), InsR(IR), Wdh(W), Off(O) {}
471 unsigned SrcR, InsR;
487 unsigned SrcR = P.IFR.SrcR, InsR = P.IFR.InsR;
488 OS << '(' << printReg(SrcR, P.TRI) << ',' << printReg(InsR, P.TRI)
534 bool isValidInsertForm(unsigned DstR, unsigned SrcR, unsigned InsR,
684 bool HexagonGenInsert::isValidInsertForm(unsigned DstR, unsigned SrcR,
687 const TargetRegisterClass *SrcRC = MRI->getRegClass(SrcR);
881 unsigned SrcR = *I;
883 const BitTracker::RegisterCell &AC = CMS->lookup(SrcR);
895 // where VR and SrcR differ.
916 if (!isValidInsertForm(VR, SrcR, InsR, L, S))
919 dbgs() << printReg(VR, HRI) << " = insert(" << printReg(SrcR, HRI)
923 IFRecordWithRegSet RR(IFRecord(SrcR, InsR, L, S), RegisterSet());
1010 if (R == IF.SrcR || R == IF.InsR)
1105 unsigned M0 = BaseOrd[MaxIF.SrcR], M1 = BaseOrd[MaxIF.InsR];
1106 unsigned R0 = BaseOrd[IF.SrcR], R1 = BaseOrd[IF.InsR];
1161 unsigned SR = LL[i-1].first.SrcR, IR = LL[i-1].first.InsR;
1259 unsigned OSA = BaseOrd[A.first.SrcR], OSB = BaseOrd[B.first.SrcR];
1392 unsigned SR = LL[0].first.SrcR, IR = LL[0].first.InsR;
1412 // gisters: SrcR and InsR for a given VR may be among other registers that
1439 .addReg(IF.SrcR)
1444 MRI->clearKillFlags(IF.SrcR);