Lines Matching refs:RC
531 bool isIntClass(const TargetRegisterClass *RC) const;
645 inline bool HexagonGenInsert::isIntClass(const TargetRegisterClass *RC) const {
646 return RC == &Hexagon::IntRegsRegClass || RC == &Hexagon::DoubleRegsRegClass;
650 const BitTracker::RegisterCell &RC = CMS->lookup(VR);
651 uint16_t W = RC.width();
653 const BitTracker::BitValue &BV = RC[i];
662 const BitTracker::RegisterCell &RC = CMS->lookup(VR);
663 uint16_t W = RC.width();
668 const BitTracker::BitValue &BV = RC[i];
707 const BitTracker::RegisterCell &RC = CMS->lookup(VR);
708 for (uint16_t i = 0, w = RC.width(); i < w; ++i) {
709 const BitTracker::BitValue &V = RC[i];
717 BitTracker::RegisterCell RC = CMS->lookup(VR);
718 for (uint16_t i = 0, w = RC.width(); i < w; ++i) {
719 const BitTracker::BitValue &V = RC[i];
811 const BitTracker::RegisterCell &RC = CMS->lookup(VR);
812 uint16_t W = RC.width();
822 // Conceptually, rotate the cell RC right (i.e. towards the LSB) by S,
823 // and find matching prefixes from AVs with the rotated RC. Such a prefix
824 // would match a string of bits (of length L) in RC starting at S.
886 if (RC[i] == AC[i])
1406 const TargetRegisterClass *RC = MRI->getRegClass(VR);
1407 Register NewVR = MRI->createVirtualRegister(RC);