Lines Matching defs:RegisterSubReg

85   struct RegisterSubReg {
88 explicit RegisterSubReg(unsigned R, unsigned SR = 0) : Reg(R), SubReg(SR) {}
89 explicit RegisterSubReg(const MachineOperand &MO)
96 bool operator== (const RegisterSubReg &R) const {
316 virtual bool evaluate(const RegisterSubReg &R, const LatticeCell &SrcC,
359 bool getCell(const RegisterSubReg &R, const CellMap &Inputs, LatticeCell &RC);
365 bool evaluateCMPrr(uint32_t Cmp, const RegisterSubReg &R1, const RegisterSubReg &R2,
367 bool evaluateCMPri(uint32_t Cmp, const RegisterSubReg &R1, const APInt &A2,
369 bool evaluateCMPrp(uint32_t Cmp, const RegisterSubReg &R1, uint64_t Props2,
378 bool evaluateCOPY(const RegisterSubReg &R1, const CellMap &Inputs,
382 bool evaluateANDrr(const RegisterSubReg &R1, const RegisterSubReg &R2,
384 bool evaluateANDri(const RegisterSubReg &R1, const APInt &A2,
387 bool evaluateORrr(const RegisterSubReg &R1, const RegisterSubReg &R2,
389 bool evaluateORri(const RegisterSubReg &R1, const APInt &A2,
392 bool evaluateXORrr(const RegisterSubReg &R1, const RegisterSubReg &R2,
394 bool evaluateXORri(const RegisterSubReg &R1, const APInt &A2,
399 bool evaluateZEXTr(const RegisterSubReg &R1, unsigned Width, unsigned Bits,
403 bool evaluateSEXTr(const RegisterSubReg &R1, unsigned Width, unsigned Bits,
409 bool evaluateCLBr(const RegisterSubReg &R1, bool Zeros, bool Ones,
412 bool evaluateCTBr(const RegisterSubReg &R1, bool Zeros, bool Ones,
417 bool evaluateEXTRACTr(const RegisterSubReg &R1, unsigned Width, unsigned Bits,
423 bool evaluateSplatr(const RegisterSubReg &R1, unsigned Bits, unsigned Count,
635 RegisterSubReg DefR(MD);
662 RegisterSubReg UseR(SO);
705 RegisterSubReg DefR(MO);
1081 bool MachineConstEvaluator::getCell(const RegisterSubReg &R, const CellMap &Inputs,
1107 bool MachineConstEvaluator::evaluateCMPrr(uint32_t Cmp, const RegisterSubReg &R1,
1108 const RegisterSubReg &R2, const CellMap &Inputs, bool &Result) {
1146 bool MachineConstEvaluator::evaluateCMPri(uint32_t Cmp, const RegisterSubReg &R1,
1173 bool MachineConstEvaluator::evaluateCMPrp(uint32_t Cmp, const RegisterSubReg &R1,
1366 bool MachineConstEvaluator::evaluateCOPY(const RegisterSubReg &R1,
1371 bool MachineConstEvaluator::evaluateANDrr(const RegisterSubReg &R1,
1372 const RegisterSubReg &R2, const CellMap &Inputs, LatticeCell &Result) {
1402 bool MachineConstEvaluator::evaluateANDri(const RegisterSubReg &R1,
1438 bool MachineConstEvaluator::evaluateORrr(const RegisterSubReg &R1,
1439 const RegisterSubReg &R2, const CellMap &Inputs, LatticeCell &Result) {
1469 bool MachineConstEvaluator::evaluateORri(const RegisterSubReg &R1,
1505 bool MachineConstEvaluator::evaluateXORrr(const RegisterSubReg &R1,
1506 const RegisterSubReg &R2, const CellMap &Inputs, LatticeCell &Result) {
1534 bool MachineConstEvaluator::evaluateXORri(const RegisterSubReg &R1,
1567 bool MachineConstEvaluator::evaluateZEXTr(const RegisterSubReg &R1, unsigned Width,
1598 bool MachineConstEvaluator::evaluateSEXTr(const RegisterSubReg &R1, unsigned Width,
1663 bool MachineConstEvaluator::evaluateCLBr(const RegisterSubReg &R1, bool Zeros,
1698 bool MachineConstEvaluator::evaluateCTBr(const RegisterSubReg &R1, bool Zeros,
1733 bool MachineConstEvaluator::evaluateEXTRACTr(const RegisterSubReg &R1,
1791 bool MachineConstEvaluator::evaluateSplatr(const RegisterSubReg &R1,
1848 bool evaluate(const RegisterSubReg &R, const LatticeCell &SrcC,
1863 bool evaluateHexRSEQ32(RegisterSubReg RL, RegisterSubReg RH, const CellMap &Inputs,
1937 RegisterSubReg DefR(MD);
1944 RegisterSubReg SrcR(MI.getOperand(1));
1966 RegisterSubReg SrcRL(OpLo), SrcRH(OpHi);
2053 RegisterSubReg R(MI.getOperand(1));
2093 RegisterSubReg R1(MI.getOperand(1));
2125 RegisterSubReg R1(MI.getOperand(1));
2153 RegisterSubReg R1(MI.getOperand(1));
2204 bool HexagonConstEvaluator::evaluate(const RegisterSubReg &R,
2295 RegisterSubReg PR(MD);
2517 bool HexagonConstEvaluator::evaluateHexRSEQ32(RegisterSubReg RL, RegisterSubReg RH,
2586 RegisterSubReg DefR(MI.getOperand(0));
2606 RegisterSubReg R1(Src1);
2608 RegisterSubReg R2(Src2);
2617 RegisterSubReg R2(Src2);
2636 RegisterSubReg R1(Src1);
2644 Eval = evaluateANDrr(R1, RegisterSubReg(Src2), Inputs, RC);
2655 Eval = evaluateORrr(R1, RegisterSubReg(Src2), Inputs, RC);
2666 Eval = evaluateXORrr(R1, RegisterSubReg(Src2), Inputs, RC);
2670 RegisterSubReg DefR(MI.getOperand(0));
2679 RegisterSubReg CR(MI.getOperand(1));
2694 RegisterSubReg DefR(MI.getOperand(0));
2707 RegisterSubReg R(ValOp);
2722 RegisterSubReg R1(MI.getOperand(1));
2752 RegisterSubReg DefR(MI.getOperand(0));
2766 RegisterSubReg DefR(MI.getOperand(0));
2767 RegisterSubReg R1(MI.getOperand(1));
2805 RegisterSubReg R(MO);
2971 RegisterSubReg DefR(MI.getOperand(0));
2973 RegisterSubReg R2(MI.getOperand(2));
2974 RegisterSubReg R3(MI.getOperand(3));
2988 RegisterSubReg R1(Acc);
3035 RegisterSubReg R1(MI.getOperand(1));
3036 RegisterSubReg R2(MI.getOperand(2));
3054 RegisterSubReg SR(SO);
3055 RegisterSubReg DefR(MI.getOperand(0));
3071 RegisterSubReg R1(MI.getOperand(1));
3072 RegisterSubReg R2(MI.getOperand(2));
3086 RegisterSubReg SR(SO);
3087 RegisterSubReg DefR(MI.getOperand(0));