Lines Matching refs:rrx
3962 .Case("rrx", ARM_AM::rrx)
3982 if (ShiftTy == ARM_AM::rrx) {
4033 if (ShiftReg && ShiftTy != ARM_AM::rrx)
5835 /// rrx
5854 else if (ShiftName == "rrx" || ShiftName == "RRX")
5855 St = ARM_AM::rrx;
5862 // rrx stands alone.
5864 if (St != ARM_AM::rrx) {
6351 Mnemonic == "rrx" || Mnemonic == "ror" || Mnemonic == "sub" ||
9618 case ARM_AM::rrx: isNarrow = false; newOpc = ARM::t2RRX; break;
9696 unsigned Shifter = ARM_AM::getSORegOpc(ARM_AM::rrx, 0);
10067 // rrx shifts and asr/lsr of #32 is encoded as 0
10068 if (SOpc == ARM_AM::rrx || SOpc == ARM_AM::asr || SOpc == ARM_AM::lsr)
10092 if (SOpc == ARM_AM::rrx) return false;