Lines Matching defs:false
136 cl::init(false)); // FIXME: set to true by default once PR32780 is fixed
1142 HasStandaloneRem = false;
1226 InsertFencesForAtomic = false;
1749 return false;
1800 return false;
1803 return false;
1808 return false;
1811 return false;
1816 return false;
1819 return false;
1926 return CCAssignFnForNode(CC, false, isVarArg);
2102 bool isStructRet = (Outs.empty()) ? false : Outs[0].Flags.isSRet();
2103 bool isThisReturn = false;
2104 bool PreferIndirect = false;
2108 isTailCall = false;
2303 bool isDirect = false;
2314 bool isLocalARMFunc = false;
2446 // Set isThisReturn to false if the calling convention is not one that
2449 isThisReturn = false;
2553 return false;
2556 return false;
2559 return false;
2561 return false;
2570 return false;
2574 return false;
2577 return false;
2581 return false;
2606 return false;
2615 return false;
2620 return false;
2634 return false;
2642 return false;
2649 return false;
2657 return false;
2681 return false;
2688 return false;
2690 return false;
2693 return false;
2695 return false;
2700 return false;
2707 return false;
2751 DAG.getConstant(LROffset, DL, MVT::i32, false));
2789 bool ReturnF16 = false;
2907 return false;
2909 return false;
2917 return false;
2926 return false;
2930 return false;
2943 return false;
2951 return false;
2954 return false;
2958 return false;
2961 return false;
2964 bool HasRet = false;
2969 return false;
2974 return false;
2982 return false;
2985 return false;
3347 return false;
3452 return false;
3944 int FrameIndex = MFI.CreateFixedObject(ArgSize, ArgOffset, false);
4211 return false;
4477 // We use 0 and 1 as false and true values.
4656 // and GT for opcodes that return false for 'equality'.
4667 // Both GT and GE are ordered comparisons, and return false for 'unordered'.
4771 // It returns true if the conversion can be done, false otherwise.
4784 return false;
4817 return false;
4834 return false;
4850 usat = false;
4854 return false;
4862 return false;
4888 return false;
4897 return false;
4904 return false;
4914 return false;
5067 bool swpCmpOps = false;
5068 bool swpVselOps = false;
5100 return false;
5102 return false;
5107 return false;
5168 bool LHSSeenZero = false;
5170 bool RHSSeenZero = false;
6050 return false;
6063 return false;
6078 return false;
6085 return false;
6104 if (isVShiftLImm(N->getOperand(1), VT, false, Cnt))
6114 if (isVShiftRImm(N->getOperand(1), VT, false, false, Cnt)) {
6215 bool Invert = false;
6216 bool Swap = false;
6643 VMovVT, false, VMOVModImm);
6660 false, VMVNModImm);
6685 return false;
6702 return false;
6711 ReverseVEXT = false;
6715 return false;
6734 return false;
6753 return false;
6762 return false;
6767 return false;
6811 return false;
6815 return false;
6827 return false;
6843 return false;
6847 return false;
6854 return false;
6875 return false;
6879 return false;
6885 return false;
6894 return false;
6905 return false;
6909 return false;
6919 return false;
6930 return false;
6946 return false;
6950 return false;
6958 return false;
6968 return false;
6979 return false;
6983 return false;
6991 return false;
7001 return false;
7011 isV_UNDEF = false;
7035 return false;
7040 return false;
7049 return false;
7060 return false;
7062 return false;
7129 bool BitSet = V.isUndef() ? false : cast<ConstantSDNode>(V)->getZExtValue();
7212 bool hasDominantValue = false;
7224 isOnlyLowElement = false;
7226 isConstant = false;
7238 usesOnlyOneValue = false;
7615 return false;
7666 return false;
7979 IsScalarToVector = false;
7989 bool ReverseVEXT = false;
8016 bool isV_UNDEF = false;
8369 return false;
8377 return false;
8386 return false;
8390 return false;
8399 return false;
8402 return false;
8406 return false;
8419 return false;
8427 if (isExtendedBUILD_VECTOR(N, DAG, false))
8429 return false;
8556 return false;
8567 return false;
8579 bool isMLA = false;
8897 int FrameIdx = MFI.CreateStackObject(ByteSize, StackAlign, false);
8903 Entry.IsSExt = false;
8904 Entry.IsZExt = false;
8913 Entry.IsSExt = false;
8914 Entry.IsZExt = false;
9350 return LowerDIV_Windows(Op, DAG, /* Signed */ false);
10017 (*I)->setIsEHPad(false);
10520 return false;
10533 return false;
10626 // true/false values to select between, and a branch opcode to use.
10752 // true/false values to select between, and a branch opcode to use.
10911 MI.addOperand(MachineOperand::CreateReg(0, /*isDef=*/false));
10926 bool definesCPSR = false;
10927 bool deadCPSR = false;
10978 // Invert is set when N is the null/all ones constant when CC is false.
10985 default: return false;
10991 Invert = false;
11000 return false;
11005 return false;
11012 return false;
11056 bool AllOnes = false) {
11070 // Unless SwapSelectOps says CC should be false.
11102 return false;
11435 bool IsLeftOperandMUL = false;
11749 return false;
11752 return false;
11761 return false;
11772 return false;
12069 DCI.CombineTo(N, Res, false);
12338 DCI.CombineTo(N, Res, false);
12365 DCI.CombineTo(N, Res, false);
12382 DCI.CombineTo(N, Res, false);
12403 DCI.CombineTo(N, Res, false);
12425 return false;
12518 if (SDValue Result = combineSelectAndUseCommutative(N, false, DCI))
12595 if (SDValue Result = combineSelectAndUseCommutative(N, false, DCI))
12811 return false;
13106 bool isLaneOp = false;
13134 NumVecs = 1; isLoadOp = false; break;
13136 NumVecs = 2; isLoadOp = false; break;
13138 NumVecs = 3; isLoadOp = false; break;
13140 NumVecs = 4; isLoadOp = false; break;
13142 NumVecs = 2; isLoadOp = false; isLaneOp = true; break;
13144 NumVecs = 3; isLoadOp = false; isLaneOp = true; break;
13146 NumVecs = 4; isLoadOp = false; isLaneOp = true; break;
13157 NumVecs = 1; isLaneOp = false; break;
13159 NumVecs = 1; isLaneOp = false; isLoadOp = false; break;
13306 return false;
13311 return false;
13325 return false;
13340 return false;
13816 if (isVShiftLImm(N->getOperand(2), VT, false, Cnt)) {
13820 if (isVShiftRImm(N->getOperand(2), VT, false, true, Cnt)) {
13829 if (isVShiftRImm(N->getOperand(2), VT, false, true, Cnt))
13835 if (isVShiftLImm(N->getOperand(2), VT, false, Cnt))
13840 if (isVShiftLImm(N->getOperand(2), VT, false, Cnt))
13914 if (isVShiftLImm(N->getOperand(3), VT, false, Cnt))
13916 else if (isVShiftRImm(N->getOperand(3), VT, false, true, Cnt))
14007 if (isVShiftLImm(N->getOperand(1), VT, false, Cnt)) {
14016 if (isVShiftRImm(N->getOperand(1), VT, false, false, Cnt)) {
14296 bool Negate = false;
14778 return false;
14805 return false;
14840 return false;
14881 return false;
14890 return false;
14898 return false;
14903 return false;
14914 return false;
14919 return false;
14932 return false;
14947 return false;
14958 return false;
14965 return false;
14971 return false;
14976 return false;
14990 return false;
14998 return false;
15002 return false;
15010 return false;
15021 return false;
15025 return false;
15039 return false;
15046 return false;
15049 return false;
15084 return false;
15100 return false;
15105 return false;
15125 return false;
15132 return false;
15134 return false;
15137 return false;
15139 bool IsNeg = false;
15159 return false;
15177 return false;
15189 return false;
15200 default: return false;
15212 return false;
15221 return false;
15224 default: return false;
15243 return false;
15250 if (Scale & 1) return false;
15261 return false;
15277 return false;
15281 return false;
15289 return false;
15292 return false;
15302 default: return false;
15319 return false;
15327 if (Scale & 1) return false;
15370 return false;
15379 isInc = false;
15393 isInc = false;
15421 return false;
15429 return false;
15436 isInc = false;
15446 return false;
15454 return false;
15456 return false;
15469 isInc = false;
15477 return false;
15499 return false;
15511 return false;
15516 bool isSEXTLoad = false;
15517 bool IsMasked = false;
15539 return false;
15542 bool isLegal = false;
15557 return false;
15574 bool isSEXTLoad = false, isNonExt;
15575 bool IsMasked = false;
15601 return false;
15608 return false;
15611 return false;
15620 bool isLegal = false;
15635 return false;
15646 return false;
15753 return false;
15757 return false;
15763 return false;
15770 return false;
15781 return false;
15826 return false;
15837 return false;
15845 default: return false;
15862 return false;
16502 return false;
16507 return false;
16515 /// specified FP immediate natively. If false, the legalizer will
16520 return false;
16527 return false;
16671 return false;
16682 return false;
16689 return false;
16862 return false;
16869 return false;
16874 return false;
16884 return false;
16996 return false;
17002 return false;
17004 return false;
17008 return false;
17012 return false;
17058 return false;
17214 return false;
17352 return false;
17358 return false;
17362 return false;
17367 return false;
17375 return false;
17389 return false;
17416 return false;