Target/AMDGPU/SIMachineScheduler.cpp

537 void SIScheduleBlock::addPred(SIScheduleBlock *Pred) {
538   unsigned PredID = Pred->getID();
545   Preds.push_back(Pred);
820       SUnit *Pred = PredDep.getSUnit();
821       if (PredDep.isWeak() || Pred->NodeNum >= DAGSize)
823       if (CurrentTopDownReservedDependencyColoring[Pred->NodeNum] > 0)
824         SUColors.insert(CurrentTopDownReservedDependencyColoring[Pred->NodeNum]);
1244       SUnit *Pred = PredDep.getSUnit();
1245       if (PredDep.isWeak() || Pred->NodeNum >= DAGSize)
1247       if (Node2CurrentBlock[Pred->NodeNum] != SUID)
1248         CurrentBlocks[SUID]->addPred(CurrentBlocks[Node2CurrentBlock[Pred->NodeNum]]);
1304     for (SIScheduleBlock* Pred : Block->getPreds()) {
1305       if (!--TopDownBlock2Index[Pred->getID()])
1306         WorkList.push_back(Pred->getID());
1314     for (SIScheduleBlock* Pred : Block->getPreds()) {
1315       assert(TopDownBlock2Index[i] > TopDownBlock2Index[Pred->getID()] &&
1416       for (SIScheduleBlock *Pred : Block->getPreds()) {
1417         if (Depth < Pred->Depth + Pred->getCost())
1418           Depth = Pred->Depth + Pred->getCost();
1463       for (SIScheduleBlock* Pred: Block->getPreds()) {
1464         std::set<unsigned> PredOutRegs = Pred->getOutRegs();
1469           if (topoInd < BlocksStruct.TopDownBlock2Index[Pred->getID()]) {
1470             topoInd = BlocksStruct.TopDownBlock2Index[Pred->getID()];
1527       for (SIScheduleBlock* Pred: Block->getPreds()) {
1528         std::set<unsigned> PredOutRegs = Pred->getOutRegs();
1833       SUnit *Pred = PredDep.getSUnit();
1834       if (SITII->isLowLatencyInstruction(*Pred->getInstr())) {
1837       if (Pred->NodeNum >= DAGSize)
1839       unsigned PredPos = ScheduledSUnitsInv[Pred->NodeNum];