Lines Matching refs:DL
94 MachineBasicBlock::iterator I, const DebugLoc &DL,
520 DebugLoc DL = MI.getDebugLoc();
526 BuildMI(MBB, MI, DL, TII->get(AMDGPU::V_CNDMASK_B32_e64), DstReg)
697 DebugLoc DL = MI.getDebugLoc();
705 BuildMI(MBB, MI, DL, TII->get(AMDGPU::V_CMP_NE_U32_e64), TmpReg)
726 buildMergeLaneMasks(MBB, MI, DL, DstReg,
816 const DebugLoc &DL, unsigned DstReg,
825 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), DstReg).addReg(CurReg);
827 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), DstReg).addReg(ExecReg);
829 BuildMI(MBB, I, DL, TII->get(XorOp), DstReg)
843 BuildMI(MBB, I, DL, TII->get(AndN2Op), PrevMaskedReg)
854 BuildMI(MBB, I, DL, TII->get(AndOp), CurMaskedReg)
861 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), DstReg)
864 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), DstReg)
867 BuildMI(MBB, I, DL, TII->get(OrN2Op), DstReg)
871 BuildMI(MBB, I, DL, TII->get(OrOp), DstReg)