AMDGPU/Disassembler/AMDGPUDisassembler.cpp

668   return decodeSrcOp(OPW64, Val);
717   return decodeSrcOp(OPW64, Val);
767   return decodeSrcOp(OPW64, Val);
771   return decodeSrcOp(OPW64, Val);
897   case OPW64:
917   case OPW64: return VReg_64RegClassID;
932   case OPW64: return AReg_64RegClassID;
950   case OPW64: return SGPR_64RegClassID;
967   case OPW64: return TTMP_64RegClassID;
1021   case OPW64:
1166       auto TTmpClsId = getTtmpClassId(IsWave64 ? OPW64 : OPW32);
1172       return createSRegOperand(getSgprClassId(IsWave64 ? OPW64 : OPW32), Val);