Target/AArch64/AArch64InstrInfo.cpp

3742   bool Found = false;
3763       Found = true;
3770       Found = true;
3874   return Found;
3886   bool Found = false;
3907     Found  = Match(AArch64::FMULHrr, 1, MCP::FMULADDH_OP1);
3908     Found |= Match(AArch64::FMULHrr, 2, MCP::FMULADDH_OP2);
3914     Found |= Match(AArch64::FMULSrr, 1, MCP::FMULADDS_OP1) ||
3917     Found |= Match(AArch64::FMULSrr, 2, MCP::FMULADDS_OP2) ||
3921     Found |= Match(AArch64::FMULDrr, 1, MCP::FMULADDD_OP1) ||
3924     Found |= Match(AArch64::FMULDrr, 2, MCP::FMULADDD_OP2) ||
3928     Found |= Match(AArch64::FMULv4i16_indexed, 1, MCP::FMLAv4i16_indexed_OP1) ||
3931     Found |= Match(AArch64::FMULv4i16_indexed, 2, MCP::FMLAv4i16_indexed_OP2) ||
3935     Found |= Match(AArch64::FMULv8i16_indexed, 1, MCP::FMLAv8i16_indexed_OP1) ||
3938     Found |= Match(AArch64::FMULv8i16_indexed, 2, MCP::FMLAv8i16_indexed_OP2) ||
3942     Found |= Match(AArch64::FMULv2i32_indexed, 1, MCP::FMLAv2i32_indexed_OP1) ||
3945     Found |= Match(AArch64::FMULv2i32_indexed, 2, MCP::FMLAv2i32_indexed_OP2) ||
3949     Found |= Match(AArch64::FMULv2i64_indexed, 1, MCP::FMLAv2i64_indexed_OP1) ||
3952     Found |= Match(AArch64::FMULv2i64_indexed, 2, MCP::FMLAv2i64_indexed_OP2) ||
3956     Found |= Match(AArch64::FMULv4i32_indexed, 1, MCP::FMLAv4i32_indexed_OP1) ||
3959     Found |= Match(AArch64::FMULv4i32_indexed, 2, MCP::FMLAv4i32_indexed_OP2) ||
3963     Found  = Match(AArch64::FMULHrr, 1, MCP::FMULSUBH_OP1);
3964     Found |= Match(AArch64::FMULHrr, 2, MCP::FMULSUBH_OP2);
3965     Found |= Match(AArch64::FNMULHrr, 1, MCP::FNMULSUBH_OP1);
3968     Found = Match(AArch64::FMULSrr, 1, MCP::FMULSUBS_OP1);
3970     Found |= Match(AArch64::FMULSrr, 2, MCP::FMULSUBS_OP2) ||
3973     Found |= Match(AArch64::FNMULSrr, 1, MCP::FNMULSUBS_OP1);
3976     Found = Match(AArch64::FMULDrr, 1, MCP::FMULSUBD_OP1);
3978     Found |= Match(AArch64::FMULDrr, 2, MCP::FMULSUBD_OP2) ||
3981     Found |= Match(AArch64::FNMULDrr, 1, MCP::FNMULSUBD_OP1);
3984     Found |= Match(AArch64::FMULv4i16_indexed, 2, MCP::FMLSv4i16_indexed_OP2) ||
3987     Found |= Match(AArch64::FMULv4i16_indexed, 1, MCP::FMLSv4i16_indexed_OP1) ||
3991     Found |= Match(AArch64::FMULv8i16_indexed, 2, MCP::FMLSv8i16_indexed_OP2) ||
3994     Found |= Match(AArch64::FMULv8i16_indexed, 1, MCP::FMLSv8i16_indexed_OP1) ||
3998     Found |= Match(AArch64::FMULv2i32_indexed, 2, MCP::FMLSv2i32_indexed_OP2) ||
4001     Found |= Match(AArch64::FMULv2i32_indexed, 1, MCP::FMLSv2i32_indexed_OP1) ||
4005     Found |= Match(AArch64::FMULv2i64_indexed, 2, MCP::FMLSv2i64_indexed_OP2) ||
4008     Found |= Match(AArch64::FMULv2i64_indexed, 1, MCP::FMLSv2i64_indexed_OP1) ||
4012     Found |= Match(AArch64::FMULv4i32_indexed, 2, MCP::FMLSv4i32_indexed_OP2) ||
4015     Found |= Match(AArch64::FMULv4i32_indexed, 1, MCP::FMLSv4i32_indexed_OP1) ||
4019   return Found;