CodeGen/SelectionDAG/TargetLowering.cpp

1217     //    e.g. (A & C1)^(B & C2) -> (A & C1)|(B & C2) iff C1&C2 == 0
1230       //    e.g. (X | C1) ^ C2 --> (X | C1) & ~C2 iff (C1&C2) == C2
1333       // If this is ((X >>u C1) << ShAmt), see if we can simplify this into a
1342               unsigned C1 = SA2->getZExtValue();
1344               int Diff = ShAmt - C1;
1438       // If this is ((X << C1) >>u ShAmt), see if we can simplify this into a
1448               unsigned C1 = SA2->getZExtValue();
1450               int Diff = ShAmt - C1;
2141     SDValue C1 = getUndefOrConstantElt(BO.getOperand(1), i, UndefOp1);
2142     if (C0 && C1 && C0.getValueType() == EltVT && C1.getValueType() == EltVT)
2143       if (DAG.getNode(BO.getOpcode(), SDLoc(BO), EltVT, C0, C1).isUndef())
2918   ConstantSDNode *C1;
2919   if (!(C1 = dyn_cast<ConstantSDNode>(N1)))
2936   APInt I1 = C1->getAPIntValue();
3150     const APInt &C1 = N1C->getAPIntValue();
3155     if (N0.getOpcode() == ISD::SRL && (C1.isNullValue() || C1.isOneValue()) &&
3161         if ((C1 == 0) == (Cond == ISD::SETEQ)) {
3189       if ((Cond == ISD::SETULT && C1 == 2) || (Cond == ISD::SETUGT && C1 == 1)){
3198       if (C1 == 1 && !isOperationLegalOrCustom(ISD::CTPOP, CTVT) &&
3252         C1.getBitWidth() - C1.getNumSignBits() + 1 :
3253         C1.getActiveBits();
3257           MinBits < C1.getBitWidth() &&
3263           if (MinBits == 1 && C1 == 1)
3267           SDValue C = DAG.getConstant(C1.trunc(MinBits), dl, MinVT);
3309         N0.getOpcode() == ISD::AND && C1 == 0 &&
3367       if (C1.intersects(APInt::getHighBitsSet(C1.getBitWidth(),
3368                                               C1.getBitWidth() - InSize))) {
3380           // True if the sign bit of C1 is set.
3381           return DAG.getConstant(C1.isNegative(), dl, VT);
3384           // True if the sign bit of C1 isn't set.
3385           return DAG.getConstant(C1.isNonNegative(), dl, VT);
3404           SDValue NewConst = DAG.getConstant(C1.trunc(InSize), dl, newVT);
3424       if (C1.getMinSignedBits() > ExtSrcTyBits)
3440                           DAG.getConstant(C1 & APInt::getLowBitsSet(
3558     const APInt &C1 = N1C->getAPIntValue();
3573       if (C1 == MinVal)
3578         APInt C = C1 - 1;
3593       if (C1 == MaxVal)
3598         APInt C = C1 + 1;
3612       if (C1 == MinVal)
3618         if (C1 == MaxVal)
3622         if (C1 == MinVal+1)
3630       if (C1 == MaxVal)
3636         if (C1 == MinVal)
3640         if (C1 == MaxVal-1)
3649       if (C1.isNullValue())
3661           C1 == APInt::getSignedMaxValue(OperandBitSize))
3668           C1 == APInt::getSignedMinValue(OperandBitSize)) {
3681     const APInt &C1 = N1C->getAPIntValue();
3691         if (Cond == ISD::SETNE && C1 == 0) {// (X & 8) != 0  -->  (X & 8) >> 3
3700         } else if (Cond == ISD::SETEQ && C1 == AndRHS->getAPIntValue()) {
3702           // Perform the xform if C1 is a single bit.
3703           unsigned ShCt = C1.logBase2();
3704           if (C1.isPowerOf2() &&
3714     if (C1.getMinSignedBits() <= 64 &&
3715         !isLegalICmpImmediate(C1.getSExtValue())) {
3722           if ((-AndRHSC).isPowerOf2() && (AndRHSC & C1) == C1) {
3728               SDValue CmpRHS = DAG.getConstant(C1.lshr(ShiftBits), dl, ShValTy);
3741         APInt NewC = C1;
3744           ShiftBits = C1.countTrailingOnes();
3748           ShiftBits = C1.countTrailingZeros();
3870           // Turn (X+C1) == C2 --> X == C2-C1
3878           // Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0.
3891         // Turn (C1-X) == C2 --> X == C1-C2
5038     // x u% C1` is *always* less than C1. So given `x u% C1 == C2`,
5039     // if C2 is not less than C1, the comparison is always false.
5183   // x u% C1` is *always* less than C1. So given `x u% C1 == C2`,
5184   // if C2 is not less than C1, the comparison is always false.