CodeGen/SelectionDAG/DAGCombiner.cpp

552     SDValue MatchRotatePosNeg(SDValue Shifted, SDValue Pos, SDValue Neg,
6118 // Return true if we can prove that, whenever Neg and Pos are both in the
6119 // range [0, EltSize), Neg == (Pos == 0 ? 0 : EltSize - Pos).  This means that
6122 //     (or (shift1 X, Neg), (shift2 X, Pos))
6124 // reduces to a rotate in direction shift2 by Pos or (equivalently) a rotate
6127 static bool matchRotateSub(SDValue Pos, SDValue Neg, unsigned EltSize,
6131   //  (a) (Pos == 0 ? 0 : EltSize - Pos) == (EltSize - Pos) & (EltSize - 1)
6137   //     Neg & (EltSize - 1) == (EltSize - Pos) & (EltSize - 1)    [A]
6139   // for all Neg and Pos.  Since Neg & (EltSize - 1) == Neg' & (EltSize - 1)
6144   //     Neg == EltSize - Pos                                    [B]
6146   // for all Neg and Pos.  Note that the (or ...) then invokes undefined
6147   // behavior if Pos == 0 (and consequently Neg == EltSize).
6151   // where Neg and Pos are never in range at the same time.  E.g. for
6152   // EltSize == 32, using [A] would allow a Neg of the form (sub 64, Pos)
6153   // as well as (sub 32, Pos), but:
6155   //     (or (shift1 X, (sub 64, Pos)), (shift2 X, Pos))
6181   // On the RHS of [A], if Pos is Pos' & (EltSize - 1), just replace Pos with
6182   // Pos'.  The truncation is redundant for the purpose of the equality.
6183   if (MaskLoBits && Pos.getOpcode() == ISD::AND) {
6184     if (ConstantSDNode *PosC = isConstOrConstSplat(Pos.getOperand(1))) {
6185       KnownBits Known = DAG.computeKnownBits(Pos.getOperand(0));
6189         Pos = Pos.getOperand(0);
6195   //     (NegC - NegOp1) & Mask == (EltSize - Pos) & Mask
6197   // If NegOp1 == Pos then we need:
6203   if (Pos == NegOp1)
6206   // Check for cases where Pos has the form (add NegOp1, PosC) for some PosC.
6215   else if (Pos.getOpcode() == ISD::ADD && Pos.getOperand(0) == NegOp1) {
6216     if (ConstantSDNode *PosC = isConstOrConstSplat(Pos.getOperand(1)))
6231 // shifts of Shifted.  If Neg == <operand size> - Pos then the OR reduces
6232 // to both (PosOpcode Shifted, Pos) and (NegOpcode Shifted, Neg), with the
6233 // former being preferred if supported.  InnerPos and InnerNeg are Pos and
6235 SDValue DAGCombiner::MatchRotatePosNeg(SDValue Shifted, SDValue Pos,
6250                        HasPos ? Pos : Neg);