CodeGen/SelectionDAG/DAGCombiner.cpp

509                              SDValue N2, SDValue N3, ISD::CondCode CC,
513         ISD::CondCode CC);
515                                    SDValue N2, SDValue N3, ISD::CondCode CC);
525                            SDValue &CC) const;
813 // equivalent to a setcc. Also, set the incoming LHS, RHS, and CC references to
817                                     SDValue &CC) const {
821     CC  = N.getOperand(2);
836   CC  = N.getOperand(4);
2030   ISD::CondCode CC = cast<CondCodeSDNode>(SetCC->getOperand(2))->get();
2031   if (CC != ISD::SETEQ || !isNullConstant(SetCC.getOperand(1)) ||
7067   SDValue LHS, RHS, CC;
7068   if (TLI.isConstTrueVal(N1.getNode()) && isSetCCEquivalent(N0, LHS, RHS, CC)) {
7069     ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(),
7087       isSetCCEquivalent(N0.getOperand(0), LHS, RHS, CC)){
8321                                    ISD::CondCode CC, const TargetLowering &TLI,
8327   switch (CC) {
8384   ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
8385   if (CC == ISD::SETGT && isAllOnesOrAllOnesSplat(CondC) &&
8393   if (CC == ISD::SETLT && isNullOrNullSplat(CondC) && isNullOrNullSplat(C2)) {
8640     ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
8648                                                 CC, TLI, DAG))
8657         CC == ISD::SETUGT && N0.hasOneUse() && isAllOnesConstant(N1) &&
8895     ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
8899     if (((RHSIsAllZeros && (CC == ISD::SETGT || CC == ISD::SETGE)) ||
8900          (ISD::isBuildVectorAllOnes(RHS.getNode()) && CC == ISD::SETGT)) &&
8903     else if ((RHSIsAllZeros && (CC == ISD::SETLT || CC == ISD::SETLE)) &&
8928               combineMinNumMaxNum(DL, VT, LHS, RHS, N1, N2, CC, TLI, DAG))
8943       bool IsSigned = isSignedIntSetCC(CC);
8957         SDValue WideSetCC = DAG.getSetCC(DL, WideSetCCVT, WideLHS, WideRHS, CC);
8995   ISD::CondCode CC = cast<CondCodeSDNode>(N4)->get();
9003                                   CC, SDLoc(N), false)) {
9030   return SimplifySelectCC(SDLoc(N), N0, N1, N2, N3, CC);
9185       ISD::CondCode CC = cast<CondCodeSDNode>(User->getOperand(2))->get();
9186       if (ExtOpc == ISD::ZERO_EXTEND && ISD::isSignedIntSetCC(CC))
9585   ISD::CondCode CC = cast<CondCodeSDNode>(SetCC.getOperand(2))->get();
9591   if (CC == ISD::SETGT && isAllOnesConstant(Ones) && VT == XVT) {
9744     ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
9765           return DAG.getSetCC(DL, VT, N00, N01, CC);
9772           SDValue VsetCC = DAG.getSetCC(DL, MatchingVecType, N00, N01, CC);
9795             SimplifySelectCC(DL, N00, N01, ExtTrueVal, Zero, CC, true))
9806         SDValue SetCC = DAG.getSetCC(DL, SetCCVT, N00, N01, CC);
12499       ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
12500       switch (CC) {
13655   CondCodeSDNode *CC = cast<CondCodeSDNode>(N->getOperand(1));
13666                                CondLHS, CondRHS, CC->get(), SDLoc(N),
20053       ISD::CondCode CC;
20058         CC = cast<CondCodeSDNode>(TheSelect->getOperand(4))->get();
20065           CC = cast<CondCodeSDNode>(Cmp.getOperand(2))->get();
20071           Sqrt.getOperand(0) == CmpLHS && (CC == ISD::SETOLT ||
20072           CC == ISD::SETULT || CC == ISD::SETLT)) {
20236                                             ISD::CondCode CC) {
20249   if (CC == ISD::SETGT && TLI.hasAndNot(N2)) {
20254   } else if (CC == ISD::SETLT) {
20279       if (CC == ISD::SETGT)
20299   if (CC == ISD::SETGT)
20311     ISD::CondCode CC) {
20351       DAG.getSetCC(DL, getSetCCResultType(N0.getValueType()), N0, N1, CC);
20363 /// where 'cond' is the comparison specified by CC.
20365                                       SDValue N2, SDValue N3, ISD::CondCode CC,
20378   if (SDValue SCC = DAG.FoldSetCC(CmpResVT, N0, N1, CC, DL)) {
20388           convertSelectOfFPConstantsToLoadOffset(DL, N0, N1, N2, N3, CC))
20391   if (SDValue V = foldSelectCCToShiftAnd(DL, N0, N1, N2, N3, CC))
20400   if (CC == ISD::SETEQ && N0->getOpcode() == ISD::AND &&
20436       CC = ISD::getSetCCInverse(CC, CmpOpVT);
20448       SCC = DAG.getSetCC(DL, CmpResVT, N0, N1, CC);
20454       SCC = DAG.getSetCC(SDLoc(N0), MVT::i1, N0, N1, CC);
20482   if (N1C && N1C->isNullValue() && (CC == ISD::SETEQ || CC == ISD::SETNE)) {
20486     if (CC == ISD::SETNE)