lib/CodeGen/RegAllocGreedy.cpp

455                                   const AllocationOrder &Order);
458                                const AllocationOrder &Order);
460                                      const AllocationOrder &Order,
472   unsigned getCheapestEvicteeWeight(const AllocationOrder &Order,
492                                     AllocationOrder &Order,
502   unsigned tryAssignCSRFirstTime(LiveInterval &VirtReg, AllocationOrder &Order,
763                              AllocationOrder &Order,
766   Order.rewind();
768   while ((PhysReg = Order.next()))
771   if (!PhysReg || Order.isHint())
779     if (Order.isHint(Hint)) {
801   unsigned CheapReg = tryEvict(VirtReg, Order, NewVRegs, Cost, FixedRegisters);
810   AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo, Matrix);
812   while ((PhysReg = Order.next())) {
1015 /// \param Order            The allocation order
1022 unsigned RAGreedy::getCheapestEvicteeWeight(const AllocationOrder &Order,
1032   for (auto PhysReg : Order.getOrder()) {
1104 /// @param  Order   Physregs to try.
1107                             AllocationOrder &Order,
1118   unsigned OrderLimit = Order.getOrder().size();
1137     if (TRI->getCostPerUse(Order.getOrder().back()) >= CostPerUseLimit) {
1144   Order.rewind();
1145   while (unsigned PhysReg = Order.next(OrderLimit)) {
1166     if (Order.isHint())
1479 /// \param Order    The physical registers that may get evicted by a split
1486                                           const AllocationOrder &Order) {
1497       getCheapestEvicteeWeight(Order, LIS->getInterval(Evictee),
1539 /// \param Order          The physical registers that may get evicted by a
1546                                        const AllocationOrder &Order) {
1550   for (auto PhysReg : Order.getOrder()) {
1559       Order, LIS->getInterval(VirtRegToSplit), Cand.Intf.first(),
1584                                              const AllocationOrder &Order,
1605           splitCanCauseEvictionChain(VirtRegToSplit, Cand, BC.Number, Order)) {
1615                                          Order)) {
1646             splitCanCauseEvictionChain(VirtRegToSplit, Cand, Number, Order)) {
1829 unsigned RAGreedy::tryRegionSplit(LiveInterval &VirtReg, AllocationOrder &Order,
1853       calculateRegionSplitCost(VirtReg, Order, BestCost, NumCands,
1873                                             AllocationOrder &Order,
1878   Order.rewind();
1879   while (unsigned PhysReg = Order.next()) {
1940     Cost += calcGlobalSplitCost(Cand, Order, &HasEvictionChain);
2019 unsigned RAGreedy::tryBlockSplit(LiveInterval &VirtReg, AllocationOrder &Order,
2086 RAGreedy::tryInstructionSplit(LiveInterval &VirtReg, AllocationOrder &Order,
2229 unsigned RAGreedy::tryLocalSplit(LiveInterval &VirtReg, AllocationOrder &Order,
2318   Order.rewind();
2319   while (unsigned PhysReg = Order.next()) {
2460 unsigned RAGreedy::trySplit(LiveInterval &VirtReg, AllocationOrder &Order,
2472     unsigned PhysReg = tryLocalSplit(VirtReg, Order, NewVRegs);
2475     return tryInstructionSplit(VirtReg, Order, NewVRegs);
2490     if (unsigned PhysReg = tryAssign(VirtReg, Order, NewVRegs, FixedRegisters))
2498     unsigned PhysReg = tryRegionSplit(VirtReg, Order, NewVRegs);
2504   return tryBlockSplit(VirtReg, Order, NewVRegs);
2595 /// \p Order defines the preferred allocation order for \p VirtReg.
2604                                            AllocationOrder &Order,
2633   Order.rewind();
2634   while (unsigned PhysReg = Order.next()) {
2804                                          AllocationOrder &Order,
2826     unsigned BestCand = calculateRegionSplitCost(VirtReg, Order, BestCost,
3040   AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo, Matrix);
3041   if (unsigned PhysReg = tryAssign(VirtReg, Order, NewVRegs, FixedRegisters)) {
3049       unsigned CSRReg = tryAssignCSRFirstTime(VirtReg, Order, PhysReg,
3068             tryEvict(VirtReg, Order, NewVRegs, CostPerUseLimit,
3099     unsigned PhysReg = trySplit(VirtReg, Order, NewVRegs, FixedRegisters);
3110     return tryLastChanceRecoloring(VirtReg, Order, NewVRegs, FixedRegisters,