Lines Matching refs:Res

163 MachineInstrBuilder MachineIRBuilder::buildDynStackAlloc(const DstOp &Res,
166 assert(Res.getLLTTy(*getMRI()).isPointer() && "expected ptr dst type");
168 Res.addDefToMIB(*getMRI(), MIB);
174 MachineInstrBuilder MachineIRBuilder::buildFrameIndex(const DstOp &Res,
176 assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type");
178 Res.addDefToMIB(*getMRI(), MIB);
183 MachineInstrBuilder MachineIRBuilder::buildGlobalValue(const DstOp &Res,
185 assert(Res.getLLTTy(*getMRI()).isPointer() && "invalid operand type");
186 assert(Res.getLLTTy(*getMRI()).getAddressSpace() ==
191 Res.addDefToMIB(*getMRI(), MIB);
202 void MachineIRBuilder::validateBinaryOp(const LLT &Res, const LLT &Op0,
204 assert((Res.isScalar() || Res.isVector()) && "invalid operand type");
205 assert((Res == Op0 && Res == Op1) && "type mismatch");
208 void MachineIRBuilder::validateShiftOp(const LLT &Res, const LLT &Op0,
210 assert((Res.isScalar() || Res.isVector()) && "invalid operand type");
211 assert((Res == Op0) && "type mismatch");
214 MachineInstrBuilder MachineIRBuilder::buildPtrAdd(const DstOp &Res,
217 assert(Res.getLLTTy(*getMRI()).isPointer() &&
218 Res.getLLTTy(*getMRI()) == Op0.getLLTTy(*getMRI()) && "type mismatch");
221 return buildInstr(TargetOpcode::G_PTR_ADD, {Res}, {Op0, Op1});
225 MachineIRBuilder::materializePtrAdd(Register &Res, Register Op0,
227 assert(Res == 0 && "Res is a result argument");
231 Res = Op0;
235 Res = getMRI()->createGenericVirtualRegister(getMRI()->getType(Op0));
237 return buildPtrAdd(Res, Op0, Cst.getReg(0));
240 MachineInstrBuilder MachineIRBuilder::buildPtrMask(const DstOp &Res,
243 assert(Res.getLLTTy(*getMRI()).isPointer() &&
244 Res.getLLTTy(*getMRI()) == Op0.getLLTTy(*getMRI()) && "type mismatch");
247 Res.addDefToMIB(*getMRI(), MIB);
273 MachineInstrBuilder MachineIRBuilder::buildCopy(const DstOp &Res,
275 return buildInstr(TargetOpcode::COPY, Res, Op);
278 MachineInstrBuilder MachineIRBuilder::buildConstant(const DstOp &Res,
280 LLT Ty = Res.getLLTTy(*getMRI());
289 return buildSplatVector(Res, Const);
293 Res.addDefToMIB(*getMRI(), Const);
298 MachineInstrBuilder MachineIRBuilder::buildConstant(const DstOp &Res,
301 Res.getLLTTy(*getMRI()).getScalarSizeInBits());
303 return buildConstant(Res, *CI);
306 MachineInstrBuilder MachineIRBuilder::buildFConstant(const DstOp &Res,
308 LLT Ty = Res.getLLTTy(*getMRI());
322 return buildSplatVector(Res, Const);
326 Res.addDefToMIB(*getMRI(), Const);
331 MachineInstrBuilder MachineIRBuilder::buildConstant(const DstOp &Res,
334 return buildConstant(Res, *CI);
337 MachineInstrBuilder MachineIRBuilder::buildFConstant(const DstOp &Res,
339 LLT DstTy = Res.getLLTTy(*getMRI());
343 return buildFConstant(Res, *CFP);
346 MachineInstrBuilder MachineIRBuilder::buildFConstant(const DstOp &Res,
350 return buildFConstant(Res, *CFP);
360 MachineInstrBuilder MachineIRBuilder::buildLoad(const DstOp &Res,
363 return buildLoadInstr(TargetOpcode::G_LOAD, Res, Addr, MMO);
367 const DstOp &Res,
370 assert(Res.getLLTTy(*getMRI()).isValid() && "invalid operand type");
374 Res.addDefToMIB(*getMRI(), MIB);
393 MachineInstrBuilder MachineIRBuilder::buildUAddo(const DstOp &Res,
397 return buildInstr(TargetOpcode::G_UADDO, {Res, CarryOut}, {Op0, Op1});
400 MachineInstrBuilder MachineIRBuilder::buildUAdde(const DstOp &Res,
405 return buildInstr(TargetOpcode::G_UADDE, {Res, CarryOut},
409 MachineInstrBuilder MachineIRBuilder::buildAnyExt(const DstOp &Res,
411 return buildInstr(TargetOpcode::G_ANYEXT, Res, Op);
414 MachineInstrBuilder MachineIRBuilder::buildSExt(const DstOp &Res,
416 return buildInstr(TargetOpcode::G_SEXT, Res, Op);
419 MachineInstrBuilder MachineIRBuilder::buildZExt(const DstOp &Res,
421 return buildInstr(TargetOpcode::G_ZEXT, Res, Op);
436 MachineInstrBuilder MachineIRBuilder::buildBoolExt(const DstOp &Res,
440 return buildInstr(ExtOp, Res, Op);
444 const DstOp &Res,
449 assert(Res.getLLTTy(*getMRI()).isScalar() ||
450 Res.getLLTTy(*getMRI()).isVector());
451 assert(Res.getLLTTy(*getMRI()).isScalar() ==
455 if (Res.getLLTTy(*getMRI()).getSizeInBits() >
458 else if (Res.getLLTTy(*getMRI()).getSizeInBits() <
462 assert(Res.getLLTTy(*getMRI()) == Op.getLLTTy(*getMRI()));
464 return buildInstr(Opcode, Res, Op);
467 MachineInstrBuilder MachineIRBuilder::buildSExtOrTrunc(const DstOp &Res,
469 return buildExtOrTrunc(TargetOpcode::G_SEXT, Res, Op);
472 MachineInstrBuilder MachineIRBuilder::buildZExtOrTrunc(const DstOp &Res,
474 return buildExtOrTrunc(TargetOpcode::G_ZEXT, Res, Op);
477 MachineInstrBuilder MachineIRBuilder::buildAnyExtOrTrunc(const DstOp &Res,
479 return buildExtOrTrunc(TargetOpcode::G_ANYEXT, Res, Op);
527 void MachineIRBuilder::buildSequence(Register Res, ArrayRef<Register> Ops,
535 assert(getMRI()->getType(Res).isValid() && "invalid operand type");
540 LLT ResTy = getMRI()->getType(Res);
552 buildMerge(Res, Ops);
561 ? Res
568 MachineInstrBuilder MachineIRBuilder::buildUndef(const DstOp &Res) {
569 return buildInstr(TargetOpcode::G_IMPLICIT_DEF, {Res}, {});
572 MachineInstrBuilder MachineIRBuilder::buildMerge(const DstOp &Res,
579 return buildInstr(TargetOpcode::G_MERGE_VALUES, Res, TmpVec);
582 MachineInstrBuilder MachineIRBuilder::buildUnmerge(ArrayRef<LLT> Res,
587 SmallVector<DstOp, 8> TmpVec(Res.begin(), Res.end());
592 MachineInstrBuilder MachineIRBuilder::buildUnmerge(LLT Res,
594 unsigned NumReg = Op.getLLTTy(*getMRI()).getSizeInBits() / Res.getSizeInBits();
597 TmpVec.push_back(getMRI()->createGenericVirtualRegister(Res));
601 MachineInstrBuilder MachineIRBuilder::buildUnmerge(ArrayRef<Register> Res,
606 SmallVector<DstOp, 8> TmpVec(Res.begin(), Res.end());
611 MachineInstrBuilder MachineIRBuilder::buildBuildVector(const DstOp &Res,
617 return buildInstr(TargetOpcode::G_BUILD_VECTOR, Res, TmpVec);
620 MachineInstrBuilder MachineIRBuilder::buildSplatVector(const DstOp &Res,
622 SmallVector<SrcOp, 8> TmpVec(Res.getLLTTy(*getMRI()).getNumElements(), Src);
623 return buildInstr(TargetOpcode::G_BUILD_VECTOR, Res, TmpVec);
627 MachineIRBuilder::buildBuildVectorTrunc(const DstOp &Res,
633 return buildInstr(TargetOpcode::G_BUILD_VECTOR_TRUNC, Res, TmpVec);
637 MachineIRBuilder::buildConcatVectors(const DstOp &Res, ArrayRef<Register> Ops) {
642 return buildInstr(TargetOpcode::G_CONCAT_VECTORS, Res, TmpVec);
645 MachineInstrBuilder MachineIRBuilder::buildInsert(Register Res, Register Src,
648 getMRI()->getType(Res).getSizeInBits() &&
651 if (getMRI()->getType(Res).getSizeInBits() ==
653 return buildCast(Res, Op);
657 .addDef(Res)
687 MachineInstrBuilder MachineIRBuilder::buildTrunc(const DstOp &Res,
689 return buildInstr(TargetOpcode::G_TRUNC, Res, Op);
692 MachineInstrBuilder MachineIRBuilder::buildFPTrunc(const DstOp &Res,
695 return buildInstr(TargetOpcode::G_FPTRUNC, Res, Op, Flags);
699 const DstOp &Res,
702 return buildInstr(TargetOpcode::G_ICMP, Res, {Pred, Op0, Op1});
706 const DstOp &Res,
711 return buildInstr(TargetOpcode::G_FCMP, Res, {Pred, Op0, Op1}, Flags);
714 MachineInstrBuilder MachineIRBuilder::buildSelect(const DstOp &Res,
720 return buildInstr(TargetOpcode::G_SELECT, {Res}, {Tst, Op0, Op1}, Flags);
724 MachineIRBuilder::buildInsertVectorElement(const DstOp &Res, const SrcOp &Val,
726 return buildInstr(TargetOpcode::G_INSERT_VECTOR_ELT, Res, {Val, Elt, Idx});
730 MachineIRBuilder::buildExtractVectorElement(const DstOp &Res, const SrcOp &Val,
732 return buildInstr(TargetOpcode::G_EXTRACT_VECTOR_ELT, Res, {Val, Idx});
902 MachineIRBuilder::buildBlockAddress(Register Res, const BlockAddress *BA) {
904 assert(getMRI()->getType(Res).isPointer() && "invalid res type");
907 return buildInstr(TargetOpcode::G_BLOCK_ADDR).addDef(Res).addBlockAddress(BA);
1106 "Res type must be a vector");
1123 "Res type must be a vector");