228   void validateBinaryOp(const LLT &Res, const LLT &Op0, const LLT &Op1);
229   void validateShiftOp(const LLT &Res, const LLT &Op0, const LLT &Op1);
373   /// Build and insert \p Res = G_DYN_STACKALLOC \p Size, \p Align
376   /// the allocated memory into \p Res.
378   /// \pre \p Res must be a generic virtual register with pointer type.
381   MachineInstrBuilder buildDynStackAlloc(const DstOp &Res, const SrcOp &Size,
384   /// Build and insert \p Res = G_FRAME_INDEX \p Idx
390   /// \pre \p Res must be a generic virtual register with pointer type.
393   MachineInstrBuilder buildFrameIndex(const DstOp &Res, int Idx);
395   /// Build and insert \p Res = G_GLOBAL_VALUE \p GV
398   /// into \p Res.
401   /// \pre \p Res must be a generic virtual register with pointer type
405   MachineInstrBuilder buildGlobalValue(const DstOp &Res, const GlobalValue *GV);
407   /// Build and insert \p Res = G_PTR_ADD \p Op0, \p Op1
410   /// storing the resulting pointer in \p Res. Addressible units are typically
414   /// \pre \p Res and \p Op0 must be generic virtual registers with pointer
419   MachineInstrBuilder buildPtrAdd(const DstOp &Res, const SrcOp &Op0,
422   /// Materialize and insert \p Res = G_PTR_ADD \p Op0, (G_CONSTANT \p Value)
425   /// storing the resulting pointer in \p Res. If \p Value is zero then no
427   /// \p Res.
432   /// \pre \p Res must be 0. This is to detect confusion between
434   /// \post \p Res will either be a new generic virtual register of the same
438   Optional<MachineInstrBuilder> materializePtrAdd(Register &Res, Register Op0,
442   /// Build and insert \p Res = G_PTR_MASK \p Op0, \p NumBits
449   /// \pre \p Res and \p Op0 must be generic virtual registers with pointer
455   MachineInstrBuilder buildPtrMask(const DstOp &Res, const SrcOp &Op0,
458   /// Build and insert \p Res, \p CarryOut = G_UADDO \p Op0, \p Op1
460   /// G_UADDO sets \p Res to \p Op0 + \p Op1 (truncated to the bit width) and
464   /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers with the
470   MachineInstrBuilder buildUAddo(const DstOp &Res, const DstOp &CarryOut,
473   /// Build and insert \p Res, \p CarryOut = G_UADDE \p Op0,
476   /// G_UADDE sets \p Res to \p Op0 + \p Op1 + \p CarryIn (truncated to the bit
481   /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
487   MachineInstrBuilder buildUAdde(const DstOp &Res, const DstOp &CarryOut,
491   /// Build and insert \p Res = G_ANYEXT \p Op0
499   /// \pre \p Res must be a generic virtual register with scalar or vector type.
501   /// \pre \p Op must be smaller than \p Res
505   MachineInstrBuilder buildAnyExt(const DstOp &Res, const SrcOp &Op);
507   /// Build and insert \p Res = G_SEXT \p Op
514   /// \pre \p Res must be a generic virtual register with scalar or vector type.
516   /// \pre \p Op must be smaller than \p Res
519   MachineInstrBuilder buildSExt(const DstOp &Res, const SrcOp &Op);
521   /// Build and insert \p Res = G_FPEXT \p Op
522   MachineInstrBuilder buildFPExt(const DstOp &Res, const SrcOp &Op,
524     return buildInstr(TargetOpcode::G_FPEXT, {Res}, {Op}, Flags);
552   // Build and insert \p Res = G_ANYEXT \p Op, \p Res = G_SEXT \p Op, or \p Res
554   MachineInstrBuilder buildBoolExt(const DstOp &Res, const SrcOp &Op,
557   /// Build and insert \p Res = G_ZEXT \p Op
564   /// \pre \p Res must be a generic virtual register with scalar or vector type.
566   /// \pre \p Op must be smaller than \p Res
569   MachineInstrBuilder buildZExt(const DstOp &Res, const SrcOp &Op);
571   /// Build and insert \p Res = G_SEXT \p Op, \p Res = G_TRUNC \p Op, or
572   /// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
575   /// \pre \p Res must be a generic virtual register with scalar or vector type.
579   MachineInstrBuilder buildSExtOrTrunc(const DstOp &Res, const SrcOp &Op);
581   /// Build and insert \p Res = G_ZEXT \p Op, \p Res = G_TRUNC \p Op, or
582   /// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
585   /// \pre \p Res must be a generic virtual register with scalar or vector type.
589   MachineInstrBuilder buildZExtOrTrunc(const DstOp &Res, const SrcOp &Op);
591   // Build and insert \p Res = G_ANYEXT \p Op, \p Res = G_TRUNC \p Op, or
592   /// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
595   /// \pre \p Res must be a generic virtual register with scalar or vector type.
599   MachineInstrBuilder buildAnyExtOrTrunc(const DstOp &Res, const SrcOp &Op);
601   /// Build and insert \p Res = \p ExtOpc, \p Res = G_TRUNC \p
602   /// Op, or \p Res = COPY \p Op depending on the differing sizes of \p Res and
606   /// \pre \p Res must be a generic virtual register with scalar or vector type.
610   MachineInstrBuilder buildExtOrTrunc(unsigned ExtOpc, const DstOp &Res,
663   /// Build and insert \p Res = G_CONSTANT \p Val
669   /// \pre \p Res must be a generic virtual register with scalar or pointer
673   virtual MachineInstrBuilder buildConstant(const DstOp &Res,
676   /// Build and insert \p Res = G_CONSTANT \p Val
681   /// \pre \p Res must be a generic virtual register with scalar type.
684   MachineInstrBuilder buildConstant(const DstOp &Res, int64_t Val);
685   MachineInstrBuilder buildConstant(const DstOp &Res, const APInt &Val);
687   /// Build and insert \p Res = G_FCONSTANT \p Val
693   /// \pre \p Res must be a generic virtual register with scalar type.
696   virtual MachineInstrBuilder buildFConstant(const DstOp &Res,
699   MachineInstrBuilder buildFConstant(const DstOp &Res, double Val);
700   MachineInstrBuilder buildFConstant(const DstOp &Res, const APFloat &Val);
702   /// Build and insert \p Res = COPY Op
704   /// Register-to-register COPY sets \p Res to \p Op.
709   MachineInstrBuilder buildCopy(const DstOp &Res, const SrcOp &Op);
711   /// Build and insert `Res = G_LOAD Addr, MMO`.
713   /// Loads the value stored at \p Addr. Puts the result in \p Res.
716   /// \pre \p Res must be a generic virtual register.
720   MachineInstrBuilder buildLoad(const DstOp &Res, const SrcOp &Addr,
723   /// Build and insert `Res = <opcode> Addr, MMO`.
725   /// Loads the value stored at \p Addr. Puts the result in \p Res.
728   /// \pre \p Res must be a generic virtual register.
732   MachineInstrBuilder buildLoadInstr(unsigned Opcode, const DstOp &Res,
750   /// \pre \p Res and \p Src must be generic virtual registers.
753   MachineInstrBuilder buildExtract(const DstOp &Res, const SrcOp &Src, uint64_t Index);
755   /// Build and insert \p Res = IMPLICIT_DEF.
756   MachineInstrBuilder buildUndef(const DstOp &Res);
762   /// \p Res then a G_MERGE_VALUES will be produced. Otherwise an IMPLICIT_DEF
771   void buildSequence(Register Res, ArrayRef<Register> Ops,
774   /// Build and insert \p Res = G_MERGE_VALUES \p Op0, ...
780   /// \pre The entire register \p Res (and no more) must be covered by the input
785   MachineInstrBuilder buildMerge(const DstOp &Res, ArrayRef<Register> Ops);
792   /// \pre The entire register \p Res (and no more) must be covered by the input
794   /// \pre The type of all \p Res registers must be identical.
797   MachineInstrBuilder buildUnmerge(ArrayRef<LLT> Res, const SrcOp &Op);
798   MachineInstrBuilder buildUnmerge(ArrayRef<Register> Res, const SrcOp &Op);
800   /// Build and insert an unmerge of \p Res sized pieces to cover \p Op
801   MachineInstrBuilder buildUnmerge(LLT Res, const SrcOp &Op);
803   /// Build and insert \p Res = G_BUILD_VECTOR \p Op0, ...
807   /// \pre The entire register \p Res (and no more) must be covered by the
812   MachineInstrBuilder buildBuildVector(const DstOp &Res,
815   /// Build and insert \p Res = G_BUILD_VECTOR with \p Src replicated to fill
817   MachineInstrBuilder buildSplatVector(const DstOp &Res,
820   /// Build and insert \p Res = G_BUILD_VECTOR_TRUNC \p Op0, ...
833   MachineInstrBuilder buildBuildVectorTrunc(const DstOp &Res,
836   /// Build and insert \p Res = G_CONCAT_VECTORS \p Op0, ...
842   /// \pre The entire register \p Res (and no more) must be covered by the input
847   MachineInstrBuilder buildConcatVectors(const DstOp &Res,
850   MachineInstrBuilder buildInsert(Register Res, Register Src,
863   MachineInstrBuilder buildIntrinsic(Intrinsic::ID ID, ArrayRef<Register> Res,
865   MachineInstrBuilder buildIntrinsic(Intrinsic::ID ID, ArrayRef<DstOp> Res,
868   /// Build and insert \p Res = G_FPTRUNC \p Op
873   /// \pre \p Res must be a generic virtual register with scalar or vector type.
875   /// \pre \p Res must be smaller than \p Op
878   MachineInstrBuilder buildFPTrunc(const DstOp &Res, const SrcOp &Op,
881   /// Build and insert \p Res = G_TRUNC \p Op
887   /// \pre \p Res must be a generic virtual register with scalar or vector type.
889   /// \pre \p Res must be smaller than \p Op
892   MachineInstrBuilder buildTrunc(const DstOp &Res, const SrcOp &Op);
894   /// Build and insert a \p Res = G_ICMP \p Pred, \p Op0, \p Op1
898   /// \pre \p Res must be a generic virtual register with scalar or
901   ///      same number of elements as \p Res. If \p Res is a scalar,
906   MachineInstrBuilder buildICmp(CmpInst::Predicate Pred, const DstOp &Res,
909   /// Build and insert a \p Res = G_FCMP \p Pred\p Op0, \p Op1
913   /// \pre \p Res must be a generic virtual register with scalar or
916   ///      same number of elements as \p Res (or scalar, if \p Res is
921   MachineInstrBuilder buildFCmp(CmpInst::Predicate Pred, const DstOp &Res,
925   /// Build and insert a \p Res = G_SELECT \p Tst, \p Op0, \p Op1
928   /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
935   MachineInstrBuilder buildSelect(const DstOp &Res, const SrcOp &Tst,
939   /// Build and insert \p Res = G_INSERT_VECTOR_ELT \p Val,
943   /// \pre \p Res and \p Val must be a generic virtual register
949   MachineInstrBuilder buildInsertVectorElement(const DstOp &Res,
954   /// Build and insert \p Res = G_EXTRACT_VECTOR_ELT \p Val, \p Idx
957   /// \pre \p Res must be a generic virtual register with scalar type.
962   MachineInstrBuilder buildExtractVectorElement(const DstOp &Res,
971   /// Addr in \p Res, along with an s1 indicating whether it was replaced.
992   /// Addr in \p Res.
1205   /// Build and insert \p Res = G_BLOCK_ADDR \p BA
1210   /// \pre \p Res must be a generic virtual register of a pointer type.
1213   MachineInstrBuilder buildBlockAddress(Register Res, const BlockAddress *BA);
1215   /// Build and insert \p Res = G_ADD \p Op0, \p Op1
1217   /// G_ADD sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
1221   /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
1232   /// Build and insert \p Res = G_SUB \p Op0, \p Op1
1234   /// G_SUB sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
1238   /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
1249   /// Build and insert \p Res = G_MUL \p Op0, \p Op1
1251   /// G_MUL sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
1255   /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
1301   /// Build and insert \p Res = G_AND \p Op0, \p Op1
1303   /// G_AND sets \p Res to the bitwise and of integer parameters \p Op0 and \p
1307   /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
1317   /// Build and insert \p Res = G_OR \p Op0, \p Op1
1319   /// G_OR sets \p Res to the bitwise or of integer parameters \p Op0 and \p
1323   /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
1332   /// Build and insert \p Res = G_XOR \p Op0, \p Op1
1340   /// \p Res = G_OR \p Op0, NegOne
1346   /// Build and insert \p Res = G_CTPOP \p Op0, \p Src0
1351   /// Build and insert \p Res = G_CTLZ \p Op0, \p Src0
1356   /// Build and insert \p Res = G_CTLZ_ZERO_UNDEF \p Op0, \p Src0
1361   /// Build and insert \p Res = G_CTTZ \p Op0, \p Src0
1366   /// Build and insert \p Res = G_CTTZ_ZERO_UNDEF \p Op0, \p Src0
1371   /// Build and insert \p Res = G_FADD \p Op0, \p Op1
1378   /// Build and insert \p Res = G_FSUB \p Op0, \p Op1
1384   /// Build and insert \p Res = G_FMA \p Op0, \p Op1, \p Op2
1391   /// Build and insert \p Res = G_FMAD \p Op0, \p Op1, \p Op2
1398   /// Build and insert \p Res = G_FNEG \p Op0
1404   /// Build and insert \p Res = G_FABS \p Op0
1422   /// Build and insert \p Res = G_FCOPYSIGN \p Op0, \p Op1
1428   /// Build and insert \p Res = G_UITOFP \p Src0
1433   /// Build and insert \p Res = G_SITOFP \p Src0
1438   /// Build and insert \p Res = G_FPTOUI \p Src0
1443   /// Build and insert \p Res = G_FPTOSI \p Src0
1448   /// Build and insert \p Res = G_SMIN \p Op0, \p Op1
1454   /// Build and insert \p Res = G_SMAX \p Op0, \p Op1
1460   /// Build and insert \p Res = G_UMIN \p Op0, \p Op1
1466   /// Build and insert \p Res = G_UMAX \p Op0, \p Op1
1472   /// Build and insert \p Res = G_JUMP_TABLE \p JTI
1474   /// G_JUMP_TABLE sets \p Res to the address of the jump table specified by

Indexes created Thu Jun 20 12:38:36 MDT 2024