Lines Matching defs:ArchSpec
1 //===-- ArchSpec.cpp --------------------------------------------*- C++ -*-===//
9 #include "lldb/Utility/ArchSpec.h"
23 static bool cores_match(const ArchSpec::Core core1, const ArchSpec::Core core2,
34 ArchSpec::Core core;
40 // This core information can be looked using the ArchSpec::Core as the index
42 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_generic,
44 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv4,
46 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv4t,
48 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv5,
50 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv5e,
52 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv5t,
54 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv6,
56 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv6m,
58 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7,
60 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7l,
62 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7f,
64 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7s,
66 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7k,
68 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7m,
70 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7em,
72 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_xscale,
74 {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumb,
76 {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv4t,
78 {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv5,
80 {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv5e,
82 {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv6,
84 {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv6m,
86 {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv7,
88 {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv7f,
90 {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv7s,
92 {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv7k,
94 {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv7m,
96 {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv7em,
99 ArchSpec::eCore_arm_arm64, "arm64"},
101 ArchSpec::eCore_arm_armv8, "armv8"},
103 ArchSpec::eCore_arm_armv8l, "armv8l"},
105 ArchSpec::eCore_arm_arm64_32, "arm64_32"},
107 ArchSpec::eCore_arm_aarch64, "aarch64"},
110 {eByteOrderBig, 4, 2, 4, llvm::Triple::mips, ArchSpec::eCore_mips32,
112 {eByteOrderBig, 4, 2, 4, llvm::Triple::mips, ArchSpec::eCore_mips32r2,
114 {eByteOrderBig, 4, 2, 4, llvm::Triple::mips, ArchSpec::eCore_mips32r3,
116 {eByteOrderBig, 4, 2, 4, llvm::Triple::mips, ArchSpec::eCore_mips32r5,
118 {eByteOrderBig, 4, 2, 4, llvm::Triple::mips, ArchSpec::eCore_mips32r6,
120 {eByteOrderLittle, 4, 2, 4, llvm::Triple::mipsel, ArchSpec::eCore_mips32el,
123 ArchSpec::eCore_mips32r2el, "mipsr2el"},
125 ArchSpec::eCore_mips32r3el, "mipsr3el"},
127 ArchSpec::eCore_mips32r5el, "mipsr5el"},
129 ArchSpec::eCore_mips32r6el, "mipsr6el"},
132 {eByteOrderBig, 8, 2, 4, llvm::Triple::mips64, ArchSpec::eCore_mips64,
134 {eByteOrderBig, 8, 2, 4, llvm::Triple::mips64, ArchSpec::eCore_mips64r2,
136 {eByteOrderBig, 8, 2, 4, llvm::Triple::mips64, ArchSpec::eCore_mips64r3,
138 {eByteOrderBig, 8, 2, 4, llvm::Triple::mips64, ArchSpec::eCore_mips64r5,
140 {eByteOrderBig, 8, 2, 4, llvm::Triple::mips64, ArchSpec::eCore_mips64r6,
143 ArchSpec::eCore_mips64el, "mips64el"},
145 ArchSpec::eCore_mips64r2el, "mips64r2el"},
147 ArchSpec::eCore_mips64r3el, "mips64r3el"},
149 ArchSpec::eCore_mips64r5el, "mips64r5el"},
151 ArchSpec::eCore_mips64r6el, "mips64r6el"},
153 {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_generic,
155 {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc601,
157 {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc602,
159 {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc603,
161 {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc603e,
163 {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc603ev,
165 {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc604,
167 {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc604e,
169 {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc620,
171 {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc750,
173 {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc7400,
175 {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc7450,
177 {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc970,
181 ArchSpec::eCore_ppc64le_generic, "powerpc64le"},
182 {eByteOrderBig, 8, 4, 4, llvm::Triple::ppc64, ArchSpec::eCore_ppc64_generic,
185 ArchSpec::eCore_ppc64_ppc970_64, "ppc970-64"},
188 ArchSpec::eCore_s390x_generic, "s390x"},
191 ArchSpec::eCore_sparc_generic, "sparc"},
193 ArchSpec::eCore_sparc9_generic, "sparcv9"},
195 {eByteOrderLittle, 4, 1, 15, llvm::Triple::x86, ArchSpec::eCore_x86_32_i386,
197 {eByteOrderLittle, 4, 1, 15, llvm::Triple::x86, ArchSpec::eCore_x86_32_i486,
200 ArchSpec::eCore_x86_32_i486sx, "i486sx"},
201 {eByteOrderLittle, 4, 1, 15, llvm::Triple::x86, ArchSpec::eCore_x86_32_i686,
205 ArchSpec::eCore_x86_64_x86_64, "x86_64"},
207 ArchSpec::eCore_x86_64_x86_64h, "x86_64h"},
209 ArchSpec::eCore_hexagon_generic, "hexagon"},
211 ArchSpec::eCore_hexagon_hexagonv4, "hexagonv4"},
213 ArchSpec::eCore_hexagon_hexagonv5, "hexagonv5"},
216 ArchSpec::eCore_uknownMach32, "unknown-mach-32"},
218 ArchSpec::eCore_uknownMach64, "unknown-mach-64"},
219 {eByteOrderLittle, 4, 2, 4, llvm::Triple::arc, ArchSpec::eCore_arc, "arc"}
224 // ArchSpec::Core enumeration.
226 ArchSpec::kNumCores,
230 ArchSpec::Core core;
244 void ArchSpec::ListSupportedArchNames(StringList &list) {
249 void ArchSpec::AutoComplete(CompletionRequest &request) {
264 {ArchSpec::eCore_arm_generic, llvm::MachO::CPU_TYPE_ARM, CPU_ANY,
266 {ArchSpec::eCore_arm_generic, llvm::MachO::CPU_TYPE_ARM, 0, UINT32_MAX,
268 {ArchSpec::eCore_arm_armv4, llvm::MachO::CPU_TYPE_ARM, 5, UINT32_MAX,
270 {ArchSpec::eCore_arm_armv4t, llvm::MachO::CPU_TYPE_ARM, 5, UINT32_MAX,
272 {ArchSpec::eCore_arm_armv6, llvm::MachO::CPU_TYPE_ARM, 6, UINT32_MAX,
274 {ArchSpec::eCore_arm_armv6m, llvm::MachO::CPU_TYPE_ARM, 14, UINT32_MAX,
276 {ArchSpec::eCore_arm_armv5, llvm::MachO::CPU_TYPE_ARM, 7, UINT32_MAX,
278 {ArchSpec::eCore_arm_armv5e, llvm::MachO::CPU_TYPE_ARM, 7, UINT32_MAX,
280 {ArchSpec::eCore_arm_armv5t, llvm::MachO::CPU_TYPE_ARM, 7, UINT32_MAX,
282 {ArchSpec::eCore_arm_xscale, llvm::MachO::CPU_TYPE_ARM, 8, UINT32_MAX,
284 {ArchSpec::eCore_arm_armv7, llvm::MachO::CPU_TYPE_ARM, 9, UINT32_MAX,
286 {ArchSpec::eCore_arm_armv7f, llvm::MachO::CPU_TYPE_ARM, 10, UINT32_MAX,
288 {ArchSpec::eCore_arm_armv7s, llvm::MachO::CPU_TYPE_ARM, 11, UINT32_MAX,
290 {ArchSpec::eCore_arm_armv7k, llvm::MachO::CPU_TYPE_ARM, 12, UINT32_MAX,
292 {ArchSpec::eCore_arm_armv7m, llvm::MachO::CPU_TYPE_ARM, 15, UINT32_MAX,
294 {ArchSpec::eCore_arm_armv7em, llvm::MachO::CPU_TYPE_ARM, 16, UINT32_MAX,
296 {ArchSpec::eCore_arm_arm64, llvm::MachO::CPU_TYPE_ARM64, 1, UINT32_MAX,
298 {ArchSpec::eCore_arm_arm64, llvm::MachO::CPU_TYPE_ARM64, 0, UINT32_MAX,
300 {ArchSpec::eCore_arm_arm64, llvm::MachO::CPU_TYPE_ARM64, 13, UINT32_MAX,
302 {ArchSpec::eCore_arm_arm64_32, llvm::MachO::CPU_TYPE_ARM64_32, 0,
304 {ArchSpec::eCore_arm_arm64_32, llvm::MachO::CPU_TYPE_ARM64_32, 1,
306 {ArchSpec::eCore_arm_arm64, llvm::MachO::CPU_TYPE_ARM64, CPU_ANY,
308 {ArchSpec::eCore_thumb, llvm::MachO::CPU_TYPE_ARM, 0, UINT32_MAX,
310 {ArchSpec::eCore_thumbv4t, llvm::MachO::CPU_TYPE_ARM, 5, UINT32_MAX,
312 {ArchSpec::eCore_thumbv5, llvm::MachO::CPU_TYPE_ARM, 7, UINT32_MAX,
314 {ArchSpec::eCore_thumbv5e, llvm::MachO::CPU_TYPE_ARM, 7, UINT32_MAX,
316 {ArchSpec::eCore_thumbv6, llvm::MachO::CPU_TYPE_ARM, 6, UINT32_MAX,
318 {ArchSpec::eCore_thumbv6m, llvm::MachO::CPU_TYPE_ARM, 14, UINT32_MAX,
320 {ArchSpec::eCore_thumbv7, llvm::MachO::CPU_TYPE_ARM, 9, UINT32_MAX,
322 {ArchSpec::eCore_thumbv7f, llvm::MachO::CPU_TYPE_ARM, 10, UINT32_MAX,
324 {ArchSpec::eCore_thumbv7s, llvm::MachO::CPU_TYPE_ARM, 11, UINT32_MAX,
326 {ArchSpec::eCore_thumbv7k, llvm::MachO::CPU_TYPE_ARM, 12, UINT32_MAX,
328 {ArchSpec::eCore_thumbv7m, llvm::MachO::CPU_TYPE_ARM, 15, UINT32_MAX,
330 {ArchSpec::eCore_thumbv7em, llvm::MachO::CPU_TYPE_ARM, 16, UINT32_MAX,
332 {ArchSpec::eCore_ppc_generic, llvm::MachO::CPU_TYPE_POWERPC, CPU_ANY,
334 {ArchSpec::eCore_ppc_generic, llvm::MachO::CPU_TYPE_POWERPC, 0, UINT32_MAX,
336 {ArchSpec::eCore_ppc_ppc601, llvm::MachO::CPU_TYPE_POWERPC, 1, UINT32_MAX,
338 {ArchSpec::eCore_ppc_ppc602, llvm::MachO::CPU_TYPE_POWERPC, 2, UINT32_MAX,
340 {ArchSpec::eCore_ppc_ppc603, llvm::MachO::CPU_TYPE_POWERPC, 3, UINT32_MAX,
342 {ArchSpec::eCore_ppc_ppc603e, llvm::MachO::CPU_TYPE_POWERPC, 4, UINT32_MAX,
344 {ArchSpec::eCore_ppc_ppc603ev, llvm::MachO::CPU_TYPE_POWERPC, 5, UINT32_MAX,
346 {ArchSpec::eCore_ppc_ppc604, llvm::MachO::CPU_TYPE_POWERPC, 6, UINT32_MAX,
348 {ArchSpec::eCore_ppc_ppc604e, llvm::MachO::CPU_TYPE_POWERPC, 7, UINT32_MAX,
350 {ArchSpec::eCore_ppc_ppc620, llvm::MachO::CPU_TYPE_POWERPC, 8, UINT32_MAX,
352 {ArchSpec::eCore_ppc_ppc750, llvm::MachO::CPU_TYPE_POWERPC, 9, UINT32_MAX,
354 {ArchSpec::eCore_ppc_ppc7400, llvm::MachO::CPU_TYPE_POWERPC, 10, UINT32_MAX,
356 {ArchSpec::eCore_ppc_ppc7450, llvm::MachO::CPU_TYPE_POWERPC, 11, UINT32_MAX,
358 {ArchSpec::eCore_ppc_ppc970, llvm::MachO::CPU_TYPE_POWERPC, 100, UINT32_MAX,
360 {ArchSpec::eCore_ppc64_generic, llvm::MachO::CPU_TYPE_POWERPC64, 0,
362 {ArchSpec::eCore_ppc64le_generic, llvm::MachO::CPU_TYPE_POWERPC64, CPU_ANY,
364 {ArchSpec::eCore_ppc64_ppc970_64, llvm::MachO::CPU_TYPE_POWERPC64, 100,
366 {ArchSpec::eCore_x86_32_i386, llvm::MachO::CPU_TYPE_I386, 3, UINT32_MAX,
368 {ArchSpec::eCore_x86_32_i486, llvm::MachO::CPU_TYPE_I386, 4, UINT32_MAX,
370 {ArchSpec::eCore_x86_32_i486sx, llvm::MachO::CPU_TYPE_I386, 0x84,
372 {ArchSpec::eCore_x86_32_i386, llvm::MachO::CPU_TYPE_I386, CPU_ANY,
374 {ArchSpec::eCore_x86_64_x86_64, llvm::MachO::CPU_TYPE_X86_64, 3, UINT32_MAX,
376 {ArchSpec::eCore_x86_64_x86_64, llvm::MachO::CPU_TYPE_X86_64, 4, UINT32_MAX,
378 {ArchSpec::eCore_x86_64_x86_64h, llvm::MachO::CPU_TYPE_X86_64, 8,
380 {ArchSpec::eCore_x86_64_x86_64, llvm::MachO::CPU_TYPE_X86_64, CPU_ANY,
384 {ArchSpec::eCore_uknownMach32, 0, 0, 0xFF000000u, 0x00000000u},
385 {ArchSpec::eCore_uknownMach64, llvm::MachO::CPU_ARCH_ABI64, 0, 0xFF000000u,
398 {ArchSpec::eCore_sparc_generic, llvm::ELF::EM_SPARC, LLDB_INVALID_CPUTYPE,
400 {ArchSpec::eCore_x86_32_i386, llvm::ELF::EM_386, LLDB_INVALID_CPUTYPE,
402 {ArchSpec::eCore_x86_32_i486, llvm::ELF::EM_IAMCU, LLDB_INVALID_CPUTYPE,
404 {ArchSpec::eCore_ppc_generic, llvm::ELF::EM_PPC, LLDB_INVALID_CPUTYPE,
406 {ArchSpec::eCore_ppc64le_generic, llvm::ELF::EM_PPC64, LLDB_INVALID_CPUTYPE,
408 {ArchSpec::eCore_ppc64_generic, llvm::ELF::EM_PPC64, LLDB_INVALID_CPUTYPE,
410 {ArchSpec::eCore_arm_generic, llvm::ELF::EM_ARM, LLDB_INVALID_CPUTYPE,
412 {ArchSpec::eCore_arm_aarch64, llvm::ELF::EM_AARCH64, LLDB_INVALID_CPUTYPE,
414 {ArchSpec::eCore_s390x_generic, llvm::ELF::EM_S390, LLDB_INVALID_CPUTYPE,
416 {ArchSpec::eCore_sparc9_generic, llvm::ELF::EM_SPARCV9,
418 {ArchSpec::eCore_x86_64_x86_64, llvm::ELF::EM_X86_64, LLDB_INVALID_CPUTYPE,
420 {ArchSpec::eCore_mips32, llvm::ELF::EM_MIPS, ArchSpec::eMIPSSubType_mips32,
422 {ArchSpec::eCore_mips32r2, llvm::ELF::EM_MIPS,
423 ArchSpec::eMIPSSubType_mips32r2, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips32r2
424 {ArchSpec::eCore_mips32r6, llvm::ELF::EM_MIPS,
425 ArchSpec::eMIPSSubType_mips32r6, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips32r6
426 {ArchSpec::eCore_mips32el, llvm::ELF::EM_MIPS,
427 ArchSpec::eMIPSSubType_mips32el, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips32el
428 {ArchSpec::eCore_mips32r2el, llvm::ELF::EM_MIPS,
429 ArchSpec::eMIPSSubType_mips32r2el, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips32r2el
430 {ArchSpec::eCore_mips32r6el, llvm::ELF::EM_MIPS,
431 ArchSpec::eMIPSSubType_mips32r6el, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips32r6el
432 {ArchSpec::eCore_mips64, llvm::ELF::EM_MIPS, ArchSpec::eMIPSSubType_mips64,
434 {ArchSpec::eCore_mips64r2, llvm::ELF::EM_MIPS,
435 ArchSpec::eMIPSSubType_mips64r2, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips64r2
436 {ArchSpec::eCore_mips64r6, llvm::ELF::EM_MIPS,
437 ArchSpec::eMIPSSubType_mips64r6, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips64r6
438 {ArchSpec::eCore_mips64el, llvm::ELF::EM_MIPS,
439 ArchSpec::eMIPSSubType_mips64el, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips64el
440 {ArchSpec::eCore_mips64r2el, llvm::ELF::EM_MIPS,
441 ArchSpec::eMIPSSubType_mips64r2el, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips64r2el
442 {ArchSpec::eCore_mips64r6el, llvm::ELF::EM_MIPS,
443 ArchSpec::eMIPSSubType_mips64r6el, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips64r6el
444 {ArchSpec::eCore_hexagon_generic, llvm::ELF::EM_HEXAGON,
446 {ArchSpec::eCore_arc, llvm::ELF::EM_ARC_COMPACT2, LLDB_INVALID_CPUTYPE,
458 {ArchSpec::eCore_x86_32_i386, llvm::COFF::IMAGE_FILE_MACHINE_I386,
460 {ArchSpec::eCore_ppc_generic, llvm::COFF::IMAGE_FILE_MACHINE_POWERPC,
462 {ArchSpec::eCore_ppc_generic, llvm::COFF::IMAGE_FILE_MACHINE_POWERPCFP,
464 {ArchSpec::eCore_arm_generic, llvm::COFF::IMAGE_FILE_MACHINE_ARM,
466 {ArchSpec::eCore_arm_armv7, llvm::COFF::IMAGE_FILE_MACHINE_ARMNT,
468 {ArchSpec::eCore_thumb, llvm::COFF::IMAGE_FILE_MACHINE_THUMB,
470 {ArchSpec::eCore_x86_64_x86_64, llvm::COFF::IMAGE_FILE_MACHINE_AMD64,
472 {ArchSpec::eCore_arm_arm64, llvm::COFF::IMAGE_FILE_MACHINE_ARM64,
513 static inline const CoreDefinition *FindCoreDefinition(ArchSpec::Core core) {
535 FindArchDefinitionEntry(const ArchDefinition *def, ArchSpec::Core core) {
550 ArchSpec::ArchSpec() {}
552 ArchSpec::ArchSpec(const char *triple_cstr) {
557 ArchSpec::ArchSpec(llvm::StringRef triple_str) { SetTriple(triple_str); }
559 ArchSpec::ArchSpec(const llvm::Triple &triple) { SetTriple(triple); }
561 ArchSpec::ArchSpec(ArchitectureType arch_type, uint32_t cpu, uint32_t subtype) {
565 ArchSpec::~ArchSpec() = default;
567 void ArchSpec::Clear() {
578 const char *ArchSpec::GetArchitectureName() const {
585 bool ArchSpec::IsMIPS() const { return GetTriple().isMIPS(); }
587 std::string ArchSpec::GetTargetABI() const {
592 switch (GetFlags() & ArchSpec::eMIPSABI_mask) {
593 case ArchSpec::eMIPSABI_N64:
596 case ArchSpec::eMIPSABI_N32:
599 case ArchSpec::eMIPSABI_O32:
609 void ArchSpec::SetFlags(std::string elf_abi) {
614 flag |= ArchSpec::eMIPSABI_N64;
616 flag |= ArchSpec::eMIPSABI_N32;
618 flag |= ArchSpec::eMIPSABI_O32;
623 std::string ArchSpec::GetClangTargetCPU() const {
628 case ArchSpec::eCore_mips32:
629 case ArchSpec::eCore_mips32el:
632 case ArchSpec::eCore_mips32r2:
633 case ArchSpec::eCore_mips32r2el:
636 case ArchSpec::eCore_mips32r3:
637 case ArchSpec::eCore_mips32r3el:
640 case ArchSpec::eCore_mips32r5:
641 case ArchSpec::eCore_mips32r5el:
644 case ArchSpec::eCore_mips32r6:
645 case ArchSpec::eCore_mips32r6el:
648 case ArchSpec::eCore_mips64:
649 case ArchSpec::eCore_mips64el:
652 case ArchSpec::eCore_mips64r2:
653 case ArchSpec::eCore_mips64r2el:
656 case ArchSpec::eCore_mips64r3:
657 case ArchSpec::eCore_mips64r3el:
660 case ArchSpec::eCore_mips64r5:
661 case ArchSpec::eCore_mips64r5el:
664 case ArchSpec::eCore_mips64r6:
665 case ArchSpec::eCore_mips64r6el:
675 uint32_t ArchSpec::GetMachOCPUType() const {
687 uint32_t ArchSpec::GetMachOCPUSubType() const {
699 uint32_t ArchSpec::GetDataByteSize() const {
703 uint32_t ArchSpec::GetCodeByteSize() const {
707 llvm::Triple::ArchType ArchSpec::GetMachine() const {
715 ConstString ArchSpec::GetDistributionId() const {
719 void ArchSpec::SetDistributionId(const char *distribution_id) {
723 uint32_t ArchSpec::GetAddressByteSize() const {
737 ByteOrder ArchSpec::GetDefaultEndian() const {
744 bool ArchSpec::CharIsSignedByDefault() const {
770 lldb::ByteOrder ArchSpec::GetByteOrder() const {
779 bool ArchSpec::SetTriple(const llvm::Triple &triple) {
786 ArchSpec &arch) {
821 bool ArchSpec::SetTriple(llvm::StringRef triple) {
834 bool ArchSpec::ContainsOnlyArch(const llvm::Triple &normalized_triple) {
841 void ArchSpec::MergeFrom(const ArchSpec &other) {
859 // If this and other are both arm ArchSpecs and this ArchSpec is a generic
860 // "some kind of arm" spec but the other ArchSpec is a specific arm core,
864 IsCompatibleMatch(other) && GetCore() == ArchSpec::eCore_arm_generic &&
865 other.GetCore() != ArchSpec::eCore_arm_generic) {
874 bool ArchSpec::SetArchitecture(ArchitectureType arch_type, uint32_t cpu,
900 // the ArchSpec::TripleVendorWasSpecified() method says that any
947 uint32_t ArchSpec::GetMinimumOpcodeByteSize() const {
954 uint32_t ArchSpec::GetMaximumOpcodeByteSize() const {
961 bool ArchSpec::IsExactMatch(const ArchSpec &rhs) const {
965 bool ArchSpec::IsCompatibleMatch(const ArchSpec &rhs) const {
994 bool ArchSpec::IsEqualTo(const ArchSpec &rhs, bool exact_match) const {
1000 const ArchSpec::Core lhs_core = GetCore();
1001 const ArchSpec::Core rhs_core = rhs.GetCore();
1051 void ArchSpec::UpdateCore() {
1068 void ArchSpec::CoreUpdated(bool update_triple) {
1084 static bool cores_match(const ArchSpec::Core core1, const ArchSpec::Core core2,
1090 case ArchSpec::kCore_any:
1093 case ArchSpec::eCore_arm_generic:
1097 case ArchSpec::kCore_arm_any:
1098 if (core2 >= ArchSpec::kCore_arm_first && core2 <= ArchSpec::kCore_arm_last)
1100 if (core2 >= ArchSpec::kCore_thumb_first &&
1101 core2 <= ArchSpec::kCore_thumb_last)
1103 if (core2 == ArchSpec::kCore_arm_any)
1107 case ArchSpec::kCore_x86_32_any:
1108 if ((core2 >= ArchSpec::kCore_x86_32_first &&
1109 core2 <= ArchSpec::kCore_x86_32_last) ||
1110 (core2 == ArchSpec::kCore_x86_32_any))
1114 case ArchSpec::kCore_x86_64_any:
1115 if ((core2 >= ArchSpec::kCore_x86_64_first &&
1116 core2 <= ArchSpec::kCore_x86_64_last) ||
1117 (core2 == ArchSpec::kCore_x86_64_any))
1121 case ArchSpec::kCore_ppc_any:
1122 if ((core2 >= ArchSpec::kCore_ppc_first &&
1123 core2 <= ArchSpec::kCore_ppc_last) ||
1124 (core2 == ArchSpec::kCore_ppc_any))
1128 case ArchSpec::kCore_ppc64_any:
1129 if ((core2 >= ArchSpec::kCore_ppc64_first &&
1130 core2 <= ArchSpec::kCore_ppc64_last) ||
1131 (core2 == ArchSpec::kCore_ppc64_any))
1135 case ArchSpec::eCore_arm_armv6m:
1137 if (core2 == ArchSpec::eCore_arm_generic)
1140 if (core2 == ArchSpec::eCore_arm_armv7)
1142 if (core2 == ArchSpec::eCore_arm_armv6m)
1147 case ArchSpec::kCore_hexagon_any:
1148 if ((core2 >= ArchSpec::kCore_hexagon_first &&
1149 core2 <= ArchSpec::kCore_hexagon_last) ||
1150 (core2 == ArchSpec::kCore_hexagon_any))
1157 case ArchSpec::eCore_arm_armv7em:
1159 if (core2 == ArchSpec::eCore_arm_generic)
1161 if (core2 == ArchSpec::eCore_arm_armv7m)
1163 if (core2 == ArchSpec::eCore_arm_armv6m)
1165 if (core2 == ArchSpec::eCore_arm_armv7)
1174 case ArchSpec::eCore_arm_armv7m:
1176 if (core2 == ArchSpec::eCore_arm_generic)
1178 if (core2 == ArchSpec::eCore_arm_armv6m)
1180 if (core2 == ArchSpec::eCore_arm_armv7)
1182 if (core2 == ArchSpec::eCore_arm_armv7em)
1188 case ArchSpec::eCore_arm_armv7f:
1189 case ArchSpec::eCore_arm_armv7k:
1190 case ArchSpec::eCore_arm_armv7s:
1191 case ArchSpec::eCore_arm_armv7l:
1192 case ArchSpec::eCore_arm_armv8l:
1194 if (core2 == ArchSpec::eCore_arm_generic)
1196 if (core2 == ArchSpec::eCore_arm_armv7)
1202 case ArchSpec::eCore_x86_64_x86_64h:
1205 if (core2 == ArchSpec::eCore_x86_64_x86_64)
1210 case ArchSpec::eCore_arm_armv8:
1212 if (core2 == ArchSpec::eCore_arm_arm64)
1214 if (core2 == ArchSpec::eCore_arm_aarch64)
1220 case ArchSpec::eCore_arm_aarch64:
1222 if (core2 == ArchSpec::eCore_arm_arm64)
1224 if (core2 == ArchSpec::eCore_arm_armv8)
1230 case ArchSpec::eCore_arm_arm64:
1232 if (core2 == ArchSpec::eCore_arm_aarch64)
1234 if (core2 == ArchSpec::eCore_arm_armv8)
1240 case ArchSpec::eCore_arm_arm64_32:
1242 if (core2 == ArchSpec::eCore_arm_generic)
1248 case ArchSpec::eCore_mips32:
1250 if (core2 >= ArchSpec::kCore_mips32_first &&
1251 core2 <= ArchSpec::kCore_mips32_last)
1257 case ArchSpec::eCore_mips32el:
1259 if (core2 >= ArchSpec::kCore_mips32el_first &&
1260 core2 <= ArchSpec::kCore_mips32el_last)
1266 case ArchSpec::eCore_mips64:
1268 if (core2 >= ArchSpec::kCore_mips32_first &&
1269 core2 <= ArchSpec::kCore_mips32_last)
1271 if (core2 >= ArchSpec::kCore_mips64_first &&
1272 core2 <= ArchSpec::kCore_mips64_last)
1278 case ArchSpec::eCore_mips64el:
1280 if (core2 >= ArchSpec::kCore_mips32el_first &&
1281 core2 <= ArchSpec::kCore_mips32el_last)
1283 if (core2 >= ArchSpec::kCore_mips64el_first &&
1284 core2 <= ArchSpec::kCore_mips64el_last)
1290 case ArchSpec::eCore_mips64r2:
1291 case ArchSpec::eCore_mips64r3:
1292 case ArchSpec::eCore_mips64r5:
1294 if (core2 >= ArchSpec::kCore_mips32_first && core2 <= (core1 - 10))
1296 if (core2 >= ArchSpec::kCore_mips64_first && core2 <= (core1 - 1))
1302 case ArchSpec::eCore_mips64r2el:
1303 case ArchSpec::eCore_mips64r3el:
1304 case ArchSpec::eCore_mips64r5el:
1306 if (core2 >= ArchSpec::kCore_mips32el_first && core2 <= (core1 - 10))
1308 if (core2 >= ArchSpec::kCore_mips64el_first && core2 <= (core1 - 1))
1314 case ArchSpec::eCore_mips32r2:
1315 case ArchSpec::eCore_mips32r3:
1316 case ArchSpec::eCore_mips32r5:
1318 if (core2 >= ArchSpec::kCore_mips32_first && core2 <= core1)
1323 case ArchSpec::eCore_mips32r2el:
1324 case ArchSpec::eCore_mips32r3el:
1325 case ArchSpec::eCore_mips32r5el:
1327 if (core2 >= ArchSpec::kCore_mips32el_first && core2 <= core1)
1332 case ArchSpec::eCore_mips32r6:
1334 if (core2 == ArchSpec::eCore_mips32 || core2 == ArchSpec::eCore_mips32r6)
1339 case ArchSpec::eCore_mips32r6el:
1341 if (core2 == ArchSpec::eCore_mips32el ||
1342 core2 == ArchSpec::eCore_mips32r6el)
1347 case ArchSpec::eCore_mips64r6:
1349 if (core2 == ArchSpec::eCore_mips32 || core2 == ArchSpec::eCore_mips32r6)
1351 if (core2 == ArchSpec::eCore_mips64 || core2 == ArchSpec::eCore_mips64r6)
1356 case ArchSpec::eCore_mips64r6el:
1358 if (core2 == ArchSpec::eCore_mips32el ||
1359 core2 == ArchSpec::eCore_mips32r6el)
1361 if (core2 == ArchSpec::eCore_mips64el ||
1362 core2 == ArchSpec::eCore_mips64r6el)
1375 bool lldb_private::operator<(const ArchSpec &lhs, const ArchSpec &rhs) {
1376 const ArchSpec::Core lhs_core = lhs.GetCore();
1377 const ArchSpec::Core rhs_core = rhs.GetCore();
1382 bool lldb_private::operator==(const ArchSpec &lhs, const ArchSpec &rhs) {
1386 bool ArchSpec::IsFullySpecifiedTriple() const {
1405 void ArchSpec::PiecewiseTripleCompare(
1406 const ArchSpec &other, bool &arch_different, bool &vendor_different,
1422 bool ArchSpec::IsAlwaysThumbInstructions() const {
1434 if (GetCore() == ArchSpec::Core::eCore_arm_armv7m ||
1435 GetCore() == ArchSpec::Core::eCore_arm_armv7em ||
1436 GetCore() == ArchSpec::Core::eCore_arm_armv6m ||
1437 GetCore() == ArchSpec::Core::eCore_thumbv7m ||
1438 GetCore() == ArchSpec::Core::eCore_thumbv7em ||
1439 GetCore() == ArchSpec::Core::eCore_thumbv6m) {
1449 void ArchSpec::DumpTriple(llvm::raw_ostream &s) const {