Lines Matching refs:offset
673 {"SD", &EmulateInstructionMIPS64::Emulate_SD, "SD rt, offset(rs)"},
674 {"LD", &EmulateInstructionMIPS64::Emulate_LD, "LD rt, offset(base)"},
694 "LB rt, offset(base)"},
696 "LBE rt, offset(base)"},
698 "LBU rt, offset(base)"},
700 "LBUE rt, offset(base)"},
702 "LDC1 ft, offset(base)"},
704 "LDL rt, offset(base)"},
706 "LDR rt, offset(base)"},
708 "LLD rt, offset(base)"},
710 "LDC2 rt, offset(base)"},
714 "LH rt, offset(base)"},
716 "LHE rt, offset(base)"},
718 "LHU rt, offset(base)"},
720 "LHUE rt, offset(base)"},
722 "LL rt, offset(base)"},
724 "LLE rt, offset(base)"},
728 "LW rt, offset(rs)"},
730 "LWC1 ft, offset(base)"},
732 "LWC2 rt, offset(base)"},
734 "LWE rt, offset(base)"},
736 "LWL rt, offset(base)"},
738 "LWLE rt, offset(base)"},
740 "LWR rt, offset(base)"},
742 "LWRE rt, offset(base)"},
747 "SB rt, offset(base)"},
749 "SBE rt, offset(base)"},
751 "SC rt, offset(base)"},
753 "SCE rt, offset(base)"},
755 "SCD rt, offset(base)"},
757 "SDL rt, offset(base)"},
759 "SDR rt, offset(base)"},
761 "SDC1 ft, offset(base)"},
763 "SDC2 rt, offset(base)"},
767 "SH rt, offset(base)"},
769 "SHE rt, offset(base)"},
773 "SW rt, offset(rs)"},
775 "SWC1 ft, offset(base)"},
777 "SWC2 rt, offset(base)"},
779 "SWE rt, offset(base)"},
781 "SWL rt, offset(base)"},
783 "SWLE rt, offset(base)"},
785 "SWR rt, offset(base)"},
787 "SWRE rt, offset(base)"},
792 {"BEQ", &EmulateInstructionMIPS64::Emulate_BXX_3ops, "BEQ rs,rt,offset"},
793 {"BEQ64", &EmulateInstructionMIPS64::Emulate_BXX_3ops, "BEQ rs,rt,offset"},
794 {"BNE", &EmulateInstructionMIPS64::Emulate_BXX_3ops, "BNE rs,rt,offset"},
795 {"BNE64", &EmulateInstructionMIPS64::Emulate_BXX_3ops, "BNE rs,rt,offset"},
797 "BEQL rs,rt,offset"},
799 "BNEL rs,rt,offset"},
801 "BGEZALL rt,offset"},
802 {"BAL", &EmulateInstructionMIPS64::Emulate_BAL, "BAL offset"},
804 "BGEZAL rs,offset"},
805 {"BALC", &EmulateInstructionMIPS64::Emulate_BALC, "BALC offset"},
806 {"BC", &EmulateInstructionMIPS64::Emulate_BC, "BC offset"},
807 {"BGEZ", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BGEZ rs,offset"},
808 {"BGEZ64", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BGEZ rs,offset"},
810 "BLEZALC rs,offset"},
812 "BGEZALC rs,offset"},
814 "BLTZALC rs,offset"},
816 "BGTZALC rs,offset"},
818 "BEQZALC rs,offset"},
820 "BNEZALC rs,offset"},
822 "BEQC rs,rt,offset"},
824 "BEQC rs,rt,offset"},
826 "BNEC rs,rt,offset"},
828 "BNEC rs,rt,offset"},
830 "BLTC rs,rt,offset"},
832 "BLTC rs,rt,offset"},
834 "BGEC rs,rt,offset"},
836 "BGEC rs,rt,offset"},
838 "BLTUC rs,rt,offset"},
840 "BLTUC rs,rt,offset"},
842 "BGEUC rs,rt,offset"},
844 "BGEUC rs,rt,offset"},
846 "BLTZC rt,offset"},
848 "BLTZC rt,offset"},
850 "BLEZC rt,offset"},
852 "BLEZC rt,offset"},
854 "BGEZC rt,offset"},
856 "BGEZC rt,offset"},
858 "BGTZC rt,offset"},
860 "BGTZC rt,offset"},
862 "BEQZC rt,offset"},
864 "BEQZC rt,offset"},
866 "BNEZC rt,offset"},
868 "BNEZC rt,offset"},
869 {"BGEZL", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BGEZL rt,offset"},
870 {"BGTZ", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BGTZ rt,offset"},
871 {"BGTZ64", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BGTZ rt,offset"},
872 {"BGTZL", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BGTZL rt,offset"},
873 {"BLEZ", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BLEZ rt,offset"},
874 {"BLEZ64", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BLEZ rt,offset"},
875 {"BLEZL", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BLEZL rt,offset"},
876 {"BLTZ", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BLTZ rt,offset"},
877 {"BLTZ64", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BLTZ rt,offset"},
879 "BLTZAL rt,offset"},
881 "BLTZALL rt,offset"},
882 {"BLTZL", &EmulateInstructionMIPS64::Emulate_BXX_2ops, "BLTZL rt,offset"},
884 "BOVC rs,rt,offset"},
886 "BNVC rs,rt,offset"},
893 {"JIALC", &EmulateInstructionMIPS64::Emulate_JIALC, "JIALC rt,offset"},
894 {"JIALC64", &EmulateInstructionMIPS64::Emulate_JIALC, "JIALC rt,offset"},
895 {"JIC", &EmulateInstructionMIPS64::Emulate_JIC, "JIC rt,offset"},
896 {"JIC64", &EmulateInstructionMIPS64::Emulate_JIC, "JIC rt,offset"},
900 {"BC1F", &EmulateInstructionMIPS64::Emulate_FP_branch, "BC1F cc, offset"},
901 {"BC1T", &EmulateInstructionMIPS64::Emulate_FP_branch, "BC1T cc, offset"},
903 "BC1FL cc, offset"},
905 "BC1TL cc, offset"},
907 "BC1EQZ ft, offset"},
909 "BC1NEZ ft, offset"},
911 "BC1ANY2F cc, offset"},
913 "BC1ANY2T cc, offset"},
915 "BC1ANY4F cc, offset"},
917 "BC1ANY4T cc, offset"},
1345 int64_t offset, pc, rs_val, rt_val, target = 0;
1350 offset = insn.getOperand(2).getImm();
1369 target = pc + offset;
1375 target = pc + offset;
1382 context.SetImmediate(offset);
1396 int64_t offset, pc, target = 0;
1401 offset = insn.getOperand(1).getImm();
1414 target = pc + offset;
1420 target = pc + offset;
1440 int64_t offset, pc, target;
1443 * BAL offset
1444 * offset = sign_ext (offset << 2)
1446 * PC = PC + offset
1448 offset = insn.getOperand(0).getImm();
1454 target = pc + offset;
1471 int64_t offset, pc, target;
1474 * BALC offset
1475 * offset = sign_ext (offset << 2)
1477 * PC = PC + 4 + offset
1479 offset = insn.getOperand(0).getImm();
1485 target = pc + offset;
1507 int64_t offset, pc, rs_val, target = 0;
1511 offset = insn.getOperand(1).getImm();
1524 target = pc + offset;
1529 target = pc + offset;
1534 target = pc + offset;
1539 target = pc + offset;
1544 target = pc + offset;
1549 target = pc + offset;
1575 int64_t offset, pc, rs_val, target = 0;
1579 offset = insn.getOperand(1).getImm();
1593 target = pc + offset;
1599 target = pc + offset;
1605 target = pc + offset;
1611 target = pc + offset;
1618 context.SetImmediate(offset);
1626 int64_t offset, pc, target;
1629 * BC offset
1630 * offset = sign_ext (offset << 2)
1631 * PC = PC + 4 + offset
1633 offset = insn.getOperand(0).getImm();
1639 target = pc + offset;
1660 int64_t offset, pc, rs_val, rt_val, target = 0;
1666 offset = insn.getOperand(2).getImm();
1684 target = pc + offset;
1689 target = pc + offset;
1694 target = pc + offset;
1699 target = pc + offset;
1704 target = pc + offset;
1709 target = pc + offset;
1714 target = pc + offset;
1719 target = pc + offset;
1726 context.SetImmediate(current_inst_size + offset);
1739 int64_t offset, pc, target = 0;
1745 offset = insn.getOperand(1).getImm();
1758 target = pc + offset;
1763 target = pc + offset;
1768 target = pc + offset;
1773 target = pc + offset;
1778 target = pc + offset;
1783 target = pc + offset;
1790 context.SetImmediate(current_inst_size + offset);
1798 uint64_t offset, pc;
1801 * J offset
1802 * offset = sign_ext (offset << 2)
1803 * PC = PC[63-28] | offset
1805 offset = insn.getOperand(0).getImm();
1812 pc = (pc & 0xFFFFFFFFF0000000ULL) | offset;
1822 uint64_t offset, target, pc;
1825 * JAL offset
1826 * offset = sign_ext (offset << 2)
1827 * PC = PC[63-28] | offset
1829 offset = insn.getOperand(0).getImm();
1836 target = (pc & 0xFFFFFFFFF0000000ULL) | offset;
1889 int64_t target, offset, pc, rt_val;
1892 * JIALC rt, offset
1893 * offset = sign_ext (offset)
1894 * PC = GPR[rt] + offset
1898 offset = insn.getOperand(1).getImm();
1909 target = rt_val + offset;
1927 int64_t target, offset, rt_val;
1930 * JIC rt, offset
1931 * offset = sign_ext (offset)
1932 * PC = GPR[rt] + offset
1935 offset = insn.getOperand(1).getImm();
1942 target = rt_val + offset;
1980 int64_t pc, offset, target = 0;
1984 * BC1F cc, offset
1987 * offset = sign_ext (offset)
1988 * PC = PC + offset
1991 offset = insn.getOperand(1).getImm();
2007 target = pc + offset;
2012 target = pc + offset;
2027 int64_t target, pc, offset;
2030 * BC1EQZ ft, offset
2033 * offset = sign_ext (offset)
2034 * PC = PC + 4 + offset
2037 offset = insn.getOperand(1).getImm();
2049 target = pc + 4 + offset;
2063 int64_t target, pc, offset;
2066 * BC1NEZ ft, offset
2069 * offset = sign_ext (offset)
2070 * PC = PC + 4 + offset
2073 offset = insn.getOperand(1).getImm();
2085 target = pc + 4 + offset;
2105 int64_t pc, offset, target = 0;
2109 offset = insn.getOperand(1).getImm();
2126 target = pc + offset;
2132 target = pc + offset;
2138 target = pc + offset;
2144 target = pc + offset;
2196 int64_t offset = insn.getOperand(1).getImm();
2236 target = pc + offset;
2265 int64_t offset = insn.getOperand(1).getImm();
2279 target = pc + offset;