Lines Matching defs:Emulate_LDST_Imm

720       {"LB", &EmulateInstructionMIPS::Emulate_LDST_Imm,
722 {"LBE", &EmulateInstructionMIPS::Emulate_LDST_Imm,
724 {"LBU", &EmulateInstructionMIPS::Emulate_LDST_Imm,
726 {"LBUE", &EmulateInstructionMIPS::Emulate_LDST_Imm,
728 {"LDC1", &EmulateInstructionMIPS::Emulate_LDST_Imm,
730 {"LD", &EmulateInstructionMIPS::Emulate_LDST_Imm,
732 {"LDL", &EmulateInstructionMIPS::Emulate_LDST_Imm,
734 {"LDR", &EmulateInstructionMIPS::Emulate_LDST_Imm,
736 {"LLD", &EmulateInstructionMIPS::Emulate_LDST_Imm,
738 {"LDC2", &EmulateInstructionMIPS::Emulate_LDST_Imm,
742 {"LH", &EmulateInstructionMIPS::Emulate_LDST_Imm,
744 {"LHE", &EmulateInstructionMIPS::Emulate_LDST_Imm,
746 {"LHU", &EmulateInstructionMIPS::Emulate_LDST_Imm,
748 {"LHUE", &EmulateInstructionMIPS::Emulate_LDST_Imm,
750 {"LL", &EmulateInstructionMIPS::Emulate_LDST_Imm,
752 {"LLE", &EmulateInstructionMIPS::Emulate_LDST_Imm,
756 {"LW", &EmulateInstructionMIPS::Emulate_LDST_Imm,
758 {"LWC1", &EmulateInstructionMIPS::Emulate_LDST_Imm,
760 {"LWC2", &EmulateInstructionMIPS::Emulate_LDST_Imm,
762 {"LWE", &EmulateInstructionMIPS::Emulate_LDST_Imm,
764 {"LWL", &EmulateInstructionMIPS::Emulate_LDST_Imm,
766 {"LWLE", &EmulateInstructionMIPS::Emulate_LDST_Imm,
768 {"LWR", &EmulateInstructionMIPS::Emulate_LDST_Imm,
770 {"LWRE", &EmulateInstructionMIPS::Emulate_LDST_Imm,
774 {"LLX", &EmulateInstructionMIPS::Emulate_LDST_Imm,
776 {"LLXE", &EmulateInstructionMIPS::Emulate_LDST_Imm,
778 {"LLDX", &EmulateInstructionMIPS::Emulate_LDST_Imm,
781 {"SB", &EmulateInstructionMIPS::Emulate_LDST_Imm,
783 {"SBE", &EmulateInstructionMIPS::Emulate_LDST_Imm,
785 {"SC", &EmulateInstructionMIPS::Emulate_LDST_Imm,
787 {"SCE", &EmulateInstructionMIPS::Emulate_LDST_Imm,
789 {"SCD", &EmulateInstructionMIPS::Emulate_LDST_Imm,
791 {"SD", &EmulateInstructionMIPS::Emulate_LDST_Imm,
793 {"SDL", &EmulateInstructionMIPS::Emulate_LDST_Imm,
795 {"SDR", &EmulateInstructionMIPS::Emulate_LDST_Imm,
797 {"SDC1", &EmulateInstructionMIPS::Emulate_LDST_Imm,
799 {"SDC2", &EmulateInstructionMIPS::Emulate_LDST_Imm,
803 {"SH", &EmulateInstructionMIPS::Emulate_LDST_Imm,
805 {"SHE", &EmulateInstructionMIPS::Emulate_LDST_Imm,
809 {"SWC1", &EmulateInstructionMIPS::Emulate_LDST_Imm,
811 {"SWC2", &EmulateInstructionMIPS::Emulate_LDST_Imm,
813 {"SWE", &EmulateInstructionMIPS::Emulate_LDST_Imm,
815 {"SWL", &EmulateInstructionMIPS::Emulate_LDST_Imm,
817 {"SWLE", &EmulateInstructionMIPS::Emulate_LDST_Imm,
819 {"SWR", &EmulateInstructionMIPS::Emulate_LDST_Imm,
821 {"SWRE", &EmulateInstructionMIPS::Emulate_LDST_Imm,
825 {"SCX", &EmulateInstructionMIPS::Emulate_LDST_Imm,
827 {"SCXE", &EmulateInstructionMIPS::Emulate_LDST_Imm,
829 {"SCDX", &EmulateInstructionMIPS::Emulate_LDST_Imm,
833 {"LBU16_MM", &EmulateInstructionMIPS::Emulate_LDST_Imm,
835 {"LHU16_MM", &EmulateInstructionMIPS::Emulate_LDST_Imm,
837 {"LW16_MM", &EmulateInstructionMIPS::Emulate_LDST_Imm,
839 {"LWGP_MM", &EmulateInstructionMIPS::Emulate_LDST_Imm,
841 {"SH16_MM", &EmulateInstructionMIPS::Emulate_LDST_Imm,
843 {"SW16_MM", &EmulateInstructionMIPS::Emulate_LDST_Imm,
845 {"SW_MM", &EmulateInstructionMIPS::Emulate_LDST_Imm,
847 {"SB16_MM", &EmulateInstructionMIPS::Emulate_LDST_Imm,
2977 bool EmulateInstructionMIPS::Emulate_LDST_Imm(llvm::MCInst &insn) {